mirror of
https://github.com/acidanthera/OpenCorePkg.git
synced 2025-12-08 19:25:01 +00:00
OcAcpiLib: Fix FadtEnableReset on nForce platforms
Use reset register 0x64 (keyboard controller) instead of 0xCF9.
This commit is contained in:
parent
34496a047d
commit
de4b1d1b2b
@ -9,6 +9,7 @@ OpenCore Changelog
|
||||
- Fixed incorrect core count on Silvermont Atom/Celeron processors
|
||||
- Fixed PM timer detection on Silvermont Atom/Celeron processors for TSC calculations
|
||||
- Fixed PM timer detection on non-Intel chipsets when booted through OpenDuet
|
||||
- Fixed `FadtEnableReset` on NVIDIA nForce chipset platforms
|
||||
|
||||
#### v0.9.3
|
||||
- Added `--force-codec` option to AudioDxe, thx @xCuri0
|
||||
|
||||
@ -35,6 +35,7 @@
|
||||
PrintLib
|
||||
ReportStatusCodeLib
|
||||
IoLib
|
||||
PciLib
|
||||
|
||||
[Guids]
|
||||
gEfiVariableGuid
|
||||
|
||||
@ -21,11 +21,15 @@ Revision History:
|
||||
#include "DxeIpl.h"
|
||||
#include "HobGeneration.h"
|
||||
|
||||
#include <Library/PciLib.h>
|
||||
|
||||
#define MPS_PTR SIGNATURE_32('_','M','P','_')
|
||||
#define SMBIOS_PTR SIGNATURE_32('_','S','M','_')
|
||||
|
||||
#define EBDA_BASE_ADDRESS 0x40E
|
||||
|
||||
#define PCI_VENDOR_NVIDIA 0x10DE
|
||||
|
||||
VOID *
|
||||
FindAcpiRsdPtr (
|
||||
VOID
|
||||
@ -327,15 +331,24 @@ PrepareFadtTable (
|
||||
);
|
||||
AcpiDescription->RESET_VALUE = Fadt->ResetValue;
|
||||
} else {
|
||||
//
|
||||
// Use mostly universal default of 0xCF9.
|
||||
//
|
||||
AcpiDescription->RESET_REG.Address = 0xCF9;
|
||||
if (PciRead16 (0) == PCI_VENDOR_NVIDIA) {
|
||||
//
|
||||
// Use 0x64 / 0xFE on NVIDIA chipset platforms.
|
||||
//
|
||||
AcpiDescription->RESET_REG.Address = 0x64;
|
||||
AcpiDescription->RESET_VALUE = 0xFE;
|
||||
} else {
|
||||
//
|
||||
// Use mostly universal default of 0xCF9.
|
||||
//
|
||||
AcpiDescription->RESET_REG.Address = 0xCF9;
|
||||
AcpiDescription->RESET_VALUE = 6;
|
||||
}
|
||||
|
||||
AcpiDescription->RESET_REG.AddressSpaceId = EFI_ACPI_3_0_SYSTEM_IO;
|
||||
AcpiDescription->RESET_REG.RegisterBitWidth = 8;
|
||||
AcpiDescription->RESET_REG.RegisterBitOffset = 0;
|
||||
AcpiDescription->RESET_REG.AccessSize = EFI_ACPI_3_0_BYTE;
|
||||
AcpiDescription->RESET_VALUE = 6;
|
||||
}
|
||||
|
||||
//
|
||||
|
||||
@ -21,6 +21,7 @@
|
||||
#include <Library/UefiBootServicesTableLib.h>
|
||||
#include <Library/OcMemoryLib.h>
|
||||
#include <Library/OcMiscLib.h>
|
||||
#include <Library/PciLib.h>
|
||||
|
||||
#include <IndustryStandard/AcpiAml.h>
|
||||
#include <IndustryStandard/Acpi.h>
|
||||
@ -29,6 +30,8 @@
|
||||
|
||||
#include <Library/OcAcpiLib.h>
|
||||
|
||||
#define PCI_VENDOR_NVIDIA 0x10DE
|
||||
|
||||
/**
|
||||
Find RSD_PTR Table In Legacy Area
|
||||
|
||||
@ -1564,12 +1567,24 @@ AcpiFadtEnableReset (
|
||||
// Resetting through port 0xCF9 is universal on Intel and AMD.
|
||||
// But may not be the case on e.g. Dell laptops and desktops, which use 0xB2.
|
||||
//
|
||||
if (PciRead16 (0) == PCI_VENDOR_NVIDIA) {
|
||||
//
|
||||
// Use 0x64 / 0xFE on NVIDIA chipset platforms.
|
||||
//
|
||||
Context->Fadt->ResetReg.Address = 0x64;
|
||||
Context->Fadt->ResetValue = 0xFE;
|
||||
} else {
|
||||
//
|
||||
// Use mostly universal default of 0xCF9.
|
||||
//
|
||||
Context->Fadt->ResetReg.Address = 0xCF9;
|
||||
Context->Fadt->ResetValue = 6;
|
||||
}
|
||||
|
||||
Context->Fadt->ResetReg.AddressSpaceId = EFI_ACPI_6_2_SYSTEM_IO;
|
||||
Context->Fadt->ResetReg.RegisterBitWidth = 8;
|
||||
Context->Fadt->ResetReg.RegisterBitOffset = 0;
|
||||
Context->Fadt->ResetReg.AccessSize = EFI_ACPI_6_2_BYTE;
|
||||
Context->Fadt->ResetReg.Address = 0xCF9;
|
||||
Context->Fadt->ResetValue = 6;
|
||||
}
|
||||
|
||||
AcpiRefreshTableChecksum ((EFI_ACPI_DESCRIPTION_HEADER *)Context->Fadt);
|
||||
|
||||
@ -40,6 +40,7 @@
|
||||
OcMemoryLib
|
||||
OcMiscLib
|
||||
PrintLib
|
||||
PciLib
|
||||
|
||||
[Guids]
|
||||
gEfiAcpi10TableGuid
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user