diff --git a/Changelog.md b/Changelog.md index bcef13af..cbc2813e 100644 --- a/Changelog.md +++ b/Changelog.md @@ -9,6 +9,7 @@ OpenCore Changelog - Fixed incorrect core count on Silvermont Atom/Celeron processors - Fixed PM timer detection on Silvermont Atom/Celeron processors for TSC calculations - Fixed PM timer detection on non-Intel chipsets when booted through OpenDuet +- Fixed `FadtEnableReset` on NVIDIA nForce chipset platforms #### v0.9.3 - Added `--force-codec` option to AudioDxe, thx @xCuri0 diff --git a/Legacy/BootPlatform/DxeIpl/DxeIpl.inf b/Legacy/BootPlatform/DxeIpl/DxeIpl.inf index e7e4fade..d4672df8 100644 --- a/Legacy/BootPlatform/DxeIpl/DxeIpl.inf +++ b/Legacy/BootPlatform/DxeIpl/DxeIpl.inf @@ -35,6 +35,7 @@ PrintLib ReportStatusCodeLib IoLib + PciLib [Guids] gEfiVariableGuid diff --git a/Legacy/BootPlatform/DxeIpl/LegacyTable.c b/Legacy/BootPlatform/DxeIpl/LegacyTable.c index df10b24d..27a06416 100644 --- a/Legacy/BootPlatform/DxeIpl/LegacyTable.c +++ b/Legacy/BootPlatform/DxeIpl/LegacyTable.c @@ -21,11 +21,15 @@ Revision History: #include "DxeIpl.h" #include "HobGeneration.h" +#include + #define MPS_PTR SIGNATURE_32('_','M','P','_') #define SMBIOS_PTR SIGNATURE_32('_','S','M','_') #define EBDA_BASE_ADDRESS 0x40E +#define PCI_VENDOR_NVIDIA 0x10DE + VOID * FindAcpiRsdPtr ( VOID @@ -327,15 +331,24 @@ PrepareFadtTable ( ); AcpiDescription->RESET_VALUE = Fadt->ResetValue; } else { - // - // Use mostly universal default of 0xCF9. - // - AcpiDescription->RESET_REG.Address = 0xCF9; + if (PciRead16 (0) == PCI_VENDOR_NVIDIA) { + // + // Use 0x64 / 0xFE on NVIDIA chipset platforms. + // + AcpiDescription->RESET_REG.Address = 0x64; + AcpiDescription->RESET_VALUE = 0xFE; + } else { + // + // Use mostly universal default of 0xCF9. + // + AcpiDescription->RESET_REG.Address = 0xCF9; + AcpiDescription->RESET_VALUE = 6; + } + AcpiDescription->RESET_REG.AddressSpaceId = EFI_ACPI_3_0_SYSTEM_IO; AcpiDescription->RESET_REG.RegisterBitWidth = 8; AcpiDescription->RESET_REG.RegisterBitOffset = 0; AcpiDescription->RESET_REG.AccessSize = EFI_ACPI_3_0_BYTE; - AcpiDescription->RESET_VALUE = 6; } // diff --git a/Library/OcAcpiLib/OcAcpiLib.c b/Library/OcAcpiLib/OcAcpiLib.c index d4b2d241..0fae9bba 100644 --- a/Library/OcAcpiLib/OcAcpiLib.c +++ b/Library/OcAcpiLib/OcAcpiLib.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include @@ -29,6 +30,8 @@ #include +#define PCI_VENDOR_NVIDIA 0x10DE + /** Find RSD_PTR Table In Legacy Area @@ -1564,12 +1567,24 @@ AcpiFadtEnableReset ( // Resetting through port 0xCF9 is universal on Intel and AMD. // But may not be the case on e.g. Dell laptops and desktops, which use 0xB2. // + if (PciRead16 (0) == PCI_VENDOR_NVIDIA) { + // + // Use 0x64 / 0xFE on NVIDIA chipset platforms. + // + Context->Fadt->ResetReg.Address = 0x64; + Context->Fadt->ResetValue = 0xFE; + } else { + // + // Use mostly universal default of 0xCF9. + // + Context->Fadt->ResetReg.Address = 0xCF9; + Context->Fadt->ResetValue = 6; + } + Context->Fadt->ResetReg.AddressSpaceId = EFI_ACPI_6_2_SYSTEM_IO; Context->Fadt->ResetReg.RegisterBitWidth = 8; Context->Fadt->ResetReg.RegisterBitOffset = 0; Context->Fadt->ResetReg.AccessSize = EFI_ACPI_6_2_BYTE; - Context->Fadt->ResetReg.Address = 0xCF9; - Context->Fadt->ResetValue = 6; } AcpiRefreshTableChecksum ((EFI_ACPI_DESCRIPTION_HEADER *)Context->Fadt); diff --git a/Library/OcAcpiLib/OcAcpiLib.inf b/Library/OcAcpiLib/OcAcpiLib.inf index 3abc5f2e..fc848f99 100755 --- a/Library/OcAcpiLib/OcAcpiLib.inf +++ b/Library/OcAcpiLib/OcAcpiLib.inf @@ -40,6 +40,7 @@ OcMemoryLib OcMiscLib PrintLib + PciLib [Guids] gEfiAcpi10TableGuid