From 888e07363b5088006314aea5a4a6732e2cbe1d5a Mon Sep 17 00:00:00 2001
From: Theodore Dubois <tblodt@icloud.com>
Date: Sat, 12 Jan 2019 21:05:33 -0500
Subject: [PATCH] Implement bt[csr] for x86_64

---
 jit/gadgets-x86_64/bits.S    | 43 +++++++++++++++++++++---------------
 jit/gadgets-x86_64/gadgets.h | 23 ++++++++++++++-----
 jit/gen.c                    |  6 ++---
 tests/qemu-test.c            |  2 --
 4 files changed, 45 insertions(+), 29 deletions(-)

diff --git a/jit/gadgets-x86_64/bits.S b/jit/gadgets-x86_64/bits.S
index 394f5ae5..4a6bc087 100644
--- a/jit/gadgets-x86_64/bits.S
+++ b/jit/gadgets-x86_64/bits.S
@@ -81,30 +81,37 @@
     .endr
 .endr
 
-.macro do_bt arg
-    andl $(32-1), %tmpd
-    btl %tmpd, \arg
+.macro do_bt_op op, arg, size, s, ss
+    and\ss $(\size-1), %tmp\s
+    \op\ss %tmp\s, \arg
     setf_c
 .endm
 
-.gadget bt32_mem
-    movl %tmpd, %r14d
-    andl $~(32-1), %r14d
-    shrl $3, %r14d
-    addl %r14d, %_addr
-    read_prep 32, bt32_mem
-    do_bt (%_addrq)
-    gret 1
+.macro do_bt op, size, s, ss
+    .gadget \op\size\()_mem
+        mov\ss %tmp\s, %r14\s
+        andl $~(\size-1), %r14d
+        shrl $3, %r14d
+        addl %r14d, %_addr
+        read_prep \size, \op\size\()_mem
+        do_bt_op \op, (%_addrq), \size, \s, \ss
+        gret 1
 
-.macro x name reg
-    .gadget bt32_\name
-        do_bt %\reg
-        gret
+    .macro x name reg
+        .gadget \op\size\()_\name
+            do_bt_op \op, %\reg, \size, \s, \ss
+            gret
+    .endm
+    .each_reg_size \size, x
+    .purgem x
 .endm
-.each_reg x
-.purgem x
 
-.gadget_array bt
+.irp op, bt,btc,bts,btr
+    .irp size, 16,32
+        ss \size, do_bt, \op
+    .endr
+    .gadget_array \op
+.endr
 
 .macro x name reg
     .gadget bswap_\name
diff --git a/jit/gadgets-x86_64/gadgets.h b/jit/gadgets-x86_64/gadgets.h
index eabb0379..dbc15685 100644
--- a/jit/gadgets-x86_64/gadgets.h
+++ b/jit/gadgets-x86_64/gadgets.h
@@ -77,17 +77,28 @@ crosspage_store_\id :
 .popsection
 .endm
 
-.macro _invoke reg, post, macro:vararg
-    \macro reg_\reg, e\reg\post
+.macro _invoke size, reg, post, macro:vararg
+    .if \size == 32
+        \macro reg_\reg, e\reg\post
+    .else
+        \macro reg_\reg, \reg\post
+    .endif
 .endm
-.macro .each_reg macro:vararg
+.macro .each_reg_size size, macro:vararg
     .irp reg, a,b,c,d
-        _invoke \reg, x, \macro
+        _invoke \size, \reg, x, \macro
     .endr
     .irp reg, si,di,bp
-        _invoke \reg, , \macro
+        _invoke \size, \reg, , \macro
     .endr
-    \macro reg_sp, _esp
+    .if \size == 32
+        \macro reg_sp, _esp
+    .else
+        \macro reg_sp, _sp
+    .endif
+.endm
+.macro .each_reg macro:vararg
+    .each_reg_size 32, \macro
 .endm
 
 .macro ss size, macro, args:vararg
diff --git a/jit/gen.c b/jit/gen.c
index 975107a0..c314c0cb 100644
--- a/jit/gen.c
+++ b/jit/gen.c
@@ -297,9 +297,9 @@ static inline bool gen_op(struct gen_state *state, gadget_t *gadgets, enum arg a
     store(dst,z)
 
 #define BT(bit, val,z) lo(bt, val, bit, z)
-#define BTC(bit, val,z) UNDEFINED
-#define BTS(bit, val,z) UNDEFINED
-#define BTR(bit, val,z) UNDEFINED
+#define BTC(bit, val,z) lo(btc, val, bit, z)
+#define BTS(bit, val,z) lo(bts, val, bit, z)
+#define BTR(bit, val,z) lo(btr, val, bit, z)
 #define BSF(src, dst,z) los(bsf, src, dst, z)
 #define BSR(src, dst,z) los(bsr, src, dst, z)
 
diff --git a/tests/qemu-test.c b/tests/qemu-test.c
index c361f413..b63bb1c3 100644
--- a/tests/qemu-test.c
+++ b/tests/qemu-test.c
@@ -174,7 +174,6 @@ static inline long i2l(long v)
 #undef CC_MASK
 #define CC_MASK (CC_C)
 
-#if 0
 #define OP bt
 #define OP_NOBYTE
 #include "qemu-test-shift.h"
@@ -190,7 +189,6 @@ static inline long i2l(long v)
 #define OP btc
 #define OP_NOBYTE
 #include "qemu-test-shift.h"
-#endif
 
 /* lea test (modrm support) */
 #define TEST_LEAQ(STR)\