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https://github.com/ish-app/ish.git
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Downgrade to softfloat 2, for improved hackability
This commit is contained in:
Theodore Dubois
parent
9cce538f49
commit
2e53637e5b
@ -2,8 +2,8 @@
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#define EMU_H
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#include <stddef.h>
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#include <softfloat.h>
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#include "misc.h"
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#include "emu/softfloat.h"
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#include "emu/memory.h"
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#include "emu/tlb.h"
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@ -102,7 +102,7 @@ struct cpu_state {
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};
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// fpu
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extFloat80_t fp[8];
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floatx80 fp[8];
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union {
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word_t fsw;
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struct {
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@ -16,7 +16,7 @@
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union xmm_reg xmm_src; \
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union xmm_reg xmm_dst; \
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\
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extFloat80_t ftmp;
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floatx80 ftmp;
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#define FINISH \
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return -1 // everything is ok.
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@ -1,33 +1,24 @@
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#include <softfloat.h>//0xffffb390
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#include "emu/softfloat.h"
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// a few extra things not included in the softfloat library
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static inline extFloat80_t extF80_to_f80(extFloat80_t f) { return f; }
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static inline extFloat80_t f80_to_extF80(extFloat80_t f) { return f; }
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static inline extFloat80_t extF80_neg(extFloat80_t f) {
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f.signExp ^= 1 << 15; // flip the sign bit
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return f;
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}
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static inline extFloat80_t extF80_abs(extFloat80_t f) {
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f.signExp &= ~(1 << 15); // clear the sign bit
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return f;
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}
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// yay hack
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static inline floatx80 floatx80_to_float80(floatx80 f) { return f; }
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static inline floatx80 float80_to_floatx80(floatx80 f) { return f; }
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#define ty_real(x) ty_real_##x
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#define ty_real_16 float16_t
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#define ty_real_32 float32_t
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#define ty_real_64 float64_t
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#define ty_real_80 extFloat80_t
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#define ty_real_16 float16
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#define ty_real_32 float32
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#define ty_real_64 float64
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#define ty_real_80 floatx80
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#define mem_read_real(addr, size) mem_read_ts(addr, ty_real(size), size)
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#define mem_write_real(addr, val, size) mem_write_ts(addr, val, ty_real(size), size)
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#define get_mem_addr_real(size) mem_read_real(addr, size)
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#define set_mem_addr_real(to, size) mem_write_real(addr, to, size)
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#define extF80_to_f(f, z) glue(extF80_to_f, sz(z))(f)
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#define f_to_extF80(f_, z) glue3(f, sz(z), _to_extF80)(f_)
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#define extF80_to_i(i, round, exact, z) glue(extF80_to_i, sz(z))(i, round, exact)
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#define i_to_extF80(i_, round, exact, z) glue3(i, sz(z), _to_extF80)(i_, round, exact)
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#define floatx80_to_float(f, z) glue(floatx80_to_float, sz(z))(f)
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#define float_to_floatx80(f_, z) glue3(float, sz(z), _to_floatx80)(f_)
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#define floatx80_to_int(i, z) glue(floatx80_to_int, sz(z))(i)
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#define int_to_floatx80(i_, z) glue3(int, sz(z), _to_floatx80)(i_)
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#define ST(i) cpu->fp[cpu->top + i]
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#define ST_i ST(modrm.rm_opcode)
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@ -37,74 +28,74 @@ static inline extFloat80_t extF80_abs(extFloat80_t f) {
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cpu->top++
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#define FXCH() \
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extFloat80_t ftmp = ST(0); ST(0) = ST_i; ST_i = ftmp
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floatx80 ftmp = ST(0); ST(0) = ST_i; ST_i = ftmp
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#define st_0 ST(0)
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#define st_i ST(modrm.rm_opcode)
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#define FADD(src, dst) \
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dst = extF80_add(dst, src)
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dst = floatx80_add(dst, src)
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#define FIADD(val,z) \
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ST(0) = extF80_add(ST(0), i64_to_extF80((sint(z)) get(val,z)))
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ST(0) = floatx80_add(ST(0), int64_to_floatx80((sint(z)) get(val,z)))
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#define FADDM(val,z) \
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ST(0) = extF80_add(ST(0), f_to_extF80(get(val,z),z))
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ST(0) = floatx80_add(ST(0), float_to_floatx80(get(val,z),z))
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#define FSUB(src, dst) \
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dst = extF80_sub(dst, src)
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dst = floatx80_sub(dst, src)
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#define FSUBM(val,z) \
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ST(0) = extF80_sub(ST(0), f_to_extF80(get(val,z),z))
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ST(0) = floatx80_sub(ST(0), float_to_floatx80(get(val,z),z))
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#define FISUB(val,z) \
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ST(0) = extF80_sub(ST(0), i64_to_extF80((sint(z)) get(val,z)))
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ST(0) = floatx80_sub(ST(0), int64_to_floatx80((sint(z)) get(val,z)))
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#define FMUL(src, dst) \
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dst = extF80_mul(dst, src)
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dst = floatx80_mul(dst, src)
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#define FIMUL(val,z) \
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ST(0) = extF80_mul(ST(0), i64_to_extF80((sint(z)) get(val,z)))
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ST(0) = floatx80_mul(ST(0), int64_to_floatx80((sint(z)) get(val,z)))
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#define FMULM(val,z) \
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ST(0) = extF80_mul(ST(0), f_to_extF80(get(val,z),z))
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ST(0) = floatx80_mul(ST(0), float_to_floatx80(get(val,z),z))
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#define FDIV(src, dst) \
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dst = extF80_div(dst, src)
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dst = floatx80_div(dst, src)
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#define FIDIV(val,z) \
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ST(0) = extF80_div(ST(0), i64_to_extF80((sint(z)) get(val,z)))
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ST(0) = floatx80_div(ST(0), int64_to_floatx80((sint(z)) get(val,z)))
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#define FDIVM(val,z) \
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ST(0) = extF80_div(ST(0), f_to_extF80(get(val,z),z))
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ST(0) = floatx80_div(ST(0), float_to_floatx80(get(val,z),z))
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#define FCHS() \
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ST(0) = extF80_neg(ST(0))
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floatx80_neg(ST(0))
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#define FABS() \
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ST(0) = extF80_abs(ST(0))
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floatx80_abs(ST(0))
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// FIXME this is the IEEE ABSOLUTELY CORRECT AND AWESOME REMAINDER which is
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// computed by fprem1, not fprem
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// only known case of intel naming an instruction by taking another instruction
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// that does the same thing but wrong and adding a 1
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#define FPREM() \
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ST(0) = extF80_rem(ST(0), ST(1))
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ST(0) = floatx80_rem(ST(0), ST(1))
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#define FUCOMI() \
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cpu->zf = extF80_eq(ST(0), ST_i); \
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cpu->cf = extF80_lt(ST(0), ST_i); \
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cpu->zf = floatx80_eq(ST(0), ST_i); \
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cpu->cf = floatx80_lt(ST(0), ST_i); \
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cpu->pf = 0; cpu->pf_res = 0
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// not worrying about nans and shit yet
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#define FUCOM() \
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cpu->c0 = extF80_lt(ST(0), ST_i); \
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cpu->c0 = floatx80_lt(ST(0), ST_i); \
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cpu->c1 = 0; \
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cpu->c2 = 0; /* again, not worrying about nans */ \
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cpu->c3 = extF80_eq(ST(0), ST_i)
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cpu->c3 = floatx80_eq(ST(0), ST_i)
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#define FILD(val,z) \
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FPUSH(i64_to_extF80((sint(z)) get(val,z)))
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FPUSH(int64_to_floatx80((sint(z)) get(val,z)))
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#define FLD() FPUSH(ST_i)
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#define FLDM(val,z) \
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FPUSH(f_to_extF80(get(val,z),z))
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FPUSH(float_to_floatx80(get(val,z),z))
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#define FLDC(what) FPUSH(fconst_##what)
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#define fconst_one i64_to_extF80(1)
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#define fconst_zero i64_to_extF80(0)
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#define fconst_one int64_to_floatx80(1)
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#define fconst_zero int64_to_floatx80(0)
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#define FSTM(dst,z) \
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set(dst, extF80_to_f(ST(0),z),z)
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set(dst, floatx80_to_float(ST(0),z),z)
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#define FIST(dst,z) \
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set(dst, extF80_to_i(ST(0), softfloat_roundingMode, false, z),z)
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set(dst, floatx80_to_int(ST(0), z),z)
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#define FST() ST_i = ST(0)
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@ -49,6 +49,6 @@
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#define MOVD(src, dst) \
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set(dst, get(src,128).dw[0],32)
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#include <softfloat.h>
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#include "emu/softfloat.h"
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#define CVTTSD2SI(src, dst) \
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set(dst, f64_to_i32(get(src,64), softfloat_round_minMag, false),32)
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set(dst, float64_to_int32(get(src,64)),32)
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714
emu/softfloat-macros.h
Normal file
714
emu/softfloat-macros.h
Normal file
@ -0,0 +1,714 @@
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// This file was originally part of Berkeley Softfloat. It has been modified for use in iSH.
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/*============================================================================
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This C source fragment is part of the Berkeley SoftFloat IEEE Floating-Point
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Arithmetic Package, Release 2c, by John R. Hauser.
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THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
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been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
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RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
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AND ORGANIZATIONS WHO CAN AND WILL TOLERATE ALL LOSSES, COSTS, OR OTHER
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PROBLEMS THEY INCUR DUE TO THE SOFTWARE WITHOUT RECOMPENSE FROM JOHN HAUSER OR
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THE INTERNATIONAL COMPUTER SCIENCE INSTITUTE, AND WHO FURTHERMORE EFFECTIVELY
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INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE INSTITUTE
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(possibly via similar legal notice) AGAINST ALL LOSSES, COSTS, OR OTHER
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PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE, OR
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INCURRED BY ANYONE DUE TO A DERIVATIVE WORK THEY CREATE USING ANY PART OF THE
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SOFTWARE.
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Derivative works require also that (1) the source code for the derivative work
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includes prominent notice that the work is derivative, and (2) the source code
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includes prominent notice of these three paragraphs for those parts of this
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code that are retained.
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=============================================================================*/
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/*----------------------------------------------------------------------------
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| Shifts `a' right by the number of bits given in `count'. If any nonzero
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| bits are shifted off, they are "jammed" into the least significant bit of
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| the result by setting the least significant bit to 1. The value of `count'
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| can be arbitrarily large; in particular, if `count' is greater than 32, the
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| result will be either 0 or 1, depending on whether `a' is zero or nonzero.
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| The result is stored in the location pointed to by `zPtr'.
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*----------------------------------------------------------------------------*/
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static inline void shift32RightJamming( uint32_t a, int16_t count, uint32_t *zPtr )
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{
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uint32_t z;
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if ( count == 0 ) {
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z = a;
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}
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else if ( count < 32 ) {
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z = ( a>>count ) | ( ( a<<( ( - count ) & 31 ) ) != 0 );
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}
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else {
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z = ( a != 0 );
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}
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*zPtr = z;
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}
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/*----------------------------------------------------------------------------
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| Shifts `a' right by the number of bits given in `count'. If any nonzero
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| bits are shifted off, they are "jammed" into the least significant bit of
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| the result by setting the least significant bit to 1. The value of `count'
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| can be arbitrarily large; in particular, if `count' is greater than 64, the
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| result will be either 0 or 1, depending on whether `a' is zero or nonzero.
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| The result is stored in the location pointed to by `zPtr'.
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*----------------------------------------------------------------------------*/
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static inline void shift64RightJamming( uint64_t a, int16_t count, uint64_t *zPtr )
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{
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uint64_t z;
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if ( count == 0 ) {
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z = a;
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}
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else if ( count < 64 ) {
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z = ( a>>count ) | ( ( a<<( ( - count ) & 63 ) ) != 0 );
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}
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else {
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z = ( a != 0 );
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}
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*zPtr = z;
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}
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/*----------------------------------------------------------------------------
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| Shifts the 128-bit value formed by concatenating `a0' and `a1' right by 64
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| _plus_ the number of bits given in `count'. The shifted result is at most
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| 64 nonzero bits; this is stored at the location pointed to by `z0Ptr'. The
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| bits shifted off form a second 64-bit result as follows: The _last_ bit
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| shifted off is the most-significant bit of the extra result, and the other
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| 63 bits of the extra result are all zero if and only if _all_but_the_last_
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| bits shifted off were all zero. This extra result is stored in the location
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| pointed to by `z1Ptr'. The value of `count' can be arbitrarily large.
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| (This routine makes more sense if `a0' and `a1' are considered to form
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| a fixed-point value with binary point between `a0' and `a1'. This fixed-
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| point value is shifted right by the number of bits given in `count', and
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| the integer part of the result is returned at the location pointed to by
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| `z0Ptr'. The fractional part of the result may be slightly corrupted as
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| described above, and is returned at the location pointed to by `z1Ptr'.)
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*----------------------------------------------------------------------------*/
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static inline void
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shift64ExtraRightJamming(
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uint64_t a0, uint64_t a1, int16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr )
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{
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uint64_t z0, z1;
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int8_t negCount = ( - count ) & 63;
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if ( count == 0 ) {
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z1 = a1;
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z0 = a0;
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}
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else if ( count < 64 ) {
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z1 = ( a0<<negCount ) | ( a1 != 0 );
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z0 = a0>>count;
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}
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else {
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if ( count == 64 ) {
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z1 = a0 | ( a1 != 0 );
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}
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else {
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z1 = ( ( a0 | a1 ) != 0 );
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}
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z0 = 0;
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}
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*z1Ptr = z1;
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*z0Ptr = z0;
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}
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/*----------------------------------------------------------------------------
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| Shifts the 128-bit value formed by concatenating `a0' and `a1' right by the
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| number of bits given in `count'. Any bits shifted off are lost. The value
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| of `count' can be arbitrarily large; in particular, if `count' is greater
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| than 128, the result will be 0. The result is broken into two 64-bit pieces
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| which are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
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*----------------------------------------------------------------------------*/
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static inline void
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shift128Right(
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uint64_t a0, uint64_t a1, int16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr )
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{
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uint64_t z0, z1;
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int8_t negCount = ( - count ) & 63;
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if ( count == 0 ) {
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z1 = a1;
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z0 = a0;
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}
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else if ( count < 64 ) {
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z1 = ( a0<<negCount ) | ( a1>>count );
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z0 = a0>>count;
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}
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else {
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z1 = ( count < 128 ) ? ( a0>>( count & 63 ) ) : 0;
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z0 = 0;
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}
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*z1Ptr = z1;
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*z0Ptr = z0;
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}
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/*----------------------------------------------------------------------------
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| Shifts the 128-bit value formed by concatenating `a0' and `a1' right by the
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| number of bits given in `count'. If any nonzero bits are shifted off, they
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| are "jammed" into the least significant bit of the result by setting the
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| least significant bit to 1. The value of `count' can be arbitrarily large;
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| in particular, if `count' is greater than 128, the result will be either
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| 0 or 1, depending on whether the concatenation of `a0' and `a1' is zero or
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| nonzero. The result is broken into two 64-bit pieces which are stored at
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| the locations pointed to by `z0Ptr' and `z1Ptr'.
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*----------------------------------------------------------------------------*/
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static inline void
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shift128RightJamming(
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uint64_t a0, uint64_t a1, int16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr )
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{
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uint64_t z0, z1;
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int8_t negCount = ( - count ) & 63;
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if ( count == 0 ) {
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z1 = a1;
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z0 = a0;
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}
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else if ( count < 64 ) {
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z1 = ( a0<<negCount ) | ( a1>>count ) | ( ( a1<<negCount ) != 0 );
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z0 = a0>>count;
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}
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else {
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if ( count == 64 ) {
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z1 = a0 | ( a1 != 0 );
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}
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else if ( count < 128 ) {
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z1 = ( a0>>( count & 63 ) ) | ( ( ( a0<<negCount ) | a1 ) != 0 );
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}
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else {
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z1 = ( ( a0 | a1 ) != 0 );
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}
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z0 = 0;
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}
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*z1Ptr = z1;
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*z0Ptr = z0;
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}
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/*----------------------------------------------------------------------------
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| Shifts the 192-bit value formed by concatenating `a0', `a1', and `a2' right
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| by 64 _plus_ the number of bits given in `count'. The shifted result is
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| at most 128 nonzero bits; these are broken into two 64-bit pieces which are
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| stored at the locations pointed to by `z0Ptr' and `z1Ptr'. The bits shifted
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| off form a third 64-bit result as follows: The _last_ bit shifted off is
|
||||
| the most-significant bit of the extra result, and the other 63 bits of the
|
||||
| extra result are all zero if and only if _all_but_the_last_ bits shifted off
|
||||
| were all zero. This extra result is stored in the location pointed to by
|
||||
| `z2Ptr'. The value of `count' can be arbitrarily large.
|
||||
| (This routine makes more sense if `a0', `a1', and `a2' are considered
|
||||
| to form a fixed-point value with binary point between `a1' and `a2'. This
|
||||
| fixed-point value is shifted right by the number of bits given in `count',
|
||||
| and the integer part of the result is returned at the locations pointed to
|
||||
| by `z0Ptr' and `z1Ptr'. The fractional part of the result may be slightly
|
||||
| corrupted as described above, and is returned at the location pointed to by
|
||||
| `z2Ptr'.)
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static inline void
|
||||
shift128ExtraRightJamming(
|
||||
uint64_t a0,
|
||||
uint64_t a1,
|
||||
uint64_t a2,
|
||||
int16_t count,
|
||||
uint64_t *z0Ptr,
|
||||
uint64_t *z1Ptr,
|
||||
uint64_t *z2Ptr
|
||||
)
|
||||
{
|
||||
uint64_t z0, z1, z2;
|
||||
int8_t negCount = ( - count ) & 63;
|
||||
|
||||
if ( count == 0 ) {
|
||||
z2 = a2;
|
||||
z1 = a1;
|
||||
z0 = a0;
|
||||
}
|
||||
else {
|
||||
if ( count < 64 ) {
|
||||
z2 = a1<<negCount;
|
||||
z1 = ( a0<<negCount ) | ( a1>>count );
|
||||
z0 = a0>>count;
|
||||
}
|
||||
else {
|
||||
if ( count == 64 ) {
|
||||
z2 = a1;
|
||||
z1 = a0;
|
||||
}
|
||||
else {
|
||||
a2 |= a1;
|
||||
if ( count < 128 ) {
|
||||
z2 = a0<<negCount;
|
||||
z1 = a0>>( count & 63 );
|
||||
}
|
||||
else {
|
||||
z2 = ( count == 128 ) ? a0 : ( a0 != 0 );
|
||||
z1 = 0;
|
||||
}
|
||||
}
|
||||
z0 = 0;
|
||||
}
|
||||
z2 |= ( a2 != 0 );
|
||||
}
|
||||
*z2Ptr = z2;
|
||||
*z1Ptr = z1;
|
||||
*z0Ptr = z0;
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Shifts the 128-bit value formed by concatenating `a0' and `a1' left by the
|
||||
| number of bits given in `count'. Any bits shifted off are lost. The value
|
||||
| of `count' must be less than 64. The result is broken into two 64-bit
|
||||
| pieces which are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static inline void
|
||||
shortShift128Left(
|
||||
uint64_t a0, uint64_t a1, int16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr )
|
||||
{
|
||||
|
||||
*z1Ptr = a1<<count;
|
||||
*z0Ptr =
|
||||
( count == 0 ) ? a0 : ( a0<<count ) | ( a1>>( ( - count ) & 63 ) );
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Shifts the 192-bit value formed by concatenating `a0', `a1', and `a2' left
|
||||
| by the number of bits given in `count'. Any bits shifted off are lost.
|
||||
| The value of `count' must be less than 64. The result is broken into three
|
||||
| 64-bit pieces which are stored at the locations pointed to by `z0Ptr',
|
||||
| `z1Ptr', and `z2Ptr'.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static inline void
|
||||
shortShift192Left(
|
||||
uint64_t a0,
|
||||
uint64_t a1,
|
||||
uint64_t a2,
|
||||
int16_t count,
|
||||
uint64_t *z0Ptr,
|
||||
uint64_t *z1Ptr,
|
||||
uint64_t *z2Ptr
|
||||
)
|
||||
{
|
||||
uint64_t z0, z1, z2;
|
||||
int8_t negCount;
|
||||
|
||||
z2 = a2<<count;
|
||||
z1 = a1<<count;
|
||||
z0 = a0<<count;
|
||||
if ( 0 < count ) {
|
||||
negCount = ( ( - count ) & 63 );
|
||||
z1 |= a2>>negCount;
|
||||
z0 |= a1>>negCount;
|
||||
}
|
||||
*z2Ptr = z2;
|
||||
*z1Ptr = z1;
|
||||
*z0Ptr = z0;
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Adds the 128-bit value formed by concatenating `a0' and `a1' to the 128-bit
|
||||
| value formed by concatenating `b0' and `b1'. Addition is modulo 2^128, so
|
||||
| any carry out is lost. The result is broken into two 64-bit pieces which
|
||||
| are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static inline void
|
||||
add128(
|
||||
uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1, uint64_t *z0Ptr, uint64_t *z1Ptr )
|
||||
{
|
||||
uint64_t z1;
|
||||
|
||||
z1 = a1 + b1;
|
||||
*z1Ptr = z1;
|
||||
*z0Ptr = a0 + b0 + ( z1 < a1 );
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Adds the 192-bit value formed by concatenating `a0', `a1', and `a2' to the
|
||||
| 192-bit value formed by concatenating `b0', `b1', and `b2'. Addition is
|
||||
| modulo 2^192, so any carry out is lost. The result is broken into three
|
||||
| 64-bit pieces which are stored at the locations pointed to by `z0Ptr',
|
||||
| `z1Ptr', and `z2Ptr'.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static inline void
|
||||
add192(
|
||||
uint64_t a0,
|
||||
uint64_t a1,
|
||||
uint64_t a2,
|
||||
uint64_t b0,
|
||||
uint64_t b1,
|
||||
uint64_t b2,
|
||||
uint64_t *z0Ptr,
|
||||
uint64_t *z1Ptr,
|
||||
uint64_t *z2Ptr
|
||||
)
|
||||
{
|
||||
uint64_t z0, z1, z2;
|
||||
int8_t carry0, carry1;
|
||||
|
||||
z2 = a2 + b2;
|
||||
carry1 = ( z2 < a2 );
|
||||
z1 = a1 + b1;
|
||||
carry0 = ( z1 < a1 );
|
||||
z0 = a0 + b0;
|
||||
z1 += carry1;
|
||||
z0 += ( z1 < carry1 );
|
||||
z0 += carry0;
|
||||
*z2Ptr = z2;
|
||||
*z1Ptr = z1;
|
||||
*z0Ptr = z0;
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Subtracts the 128-bit value formed by concatenating `b0' and `b1' from the
|
||||
| 128-bit value formed by concatenating `a0' and `a1'. Subtraction is modulo
|
||||
| 2^128, so any borrow out (carry out) is lost. The result is broken into two
|
||||
| 64-bit pieces which are stored at the locations pointed to by `z0Ptr' and
|
||||
| `z1Ptr'.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static inline void
|
||||
sub128(
|
||||
uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1, uint64_t *z0Ptr, uint64_t *z1Ptr )
|
||||
{
|
||||
|
||||
*z1Ptr = a1 - b1;
|
||||
*z0Ptr = a0 - b0 - ( a1 < b1 );
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Subtracts the 192-bit value formed by concatenating `b0', `b1', and `b2'
|
||||
| from the 192-bit value formed by concatenating `a0', `a1', and `a2'.
|
||||
| Subtraction is modulo 2^192, so any borrow out (carry out) is lost. The
|
||||
| result is broken into three 64-bit pieces which are stored at the locations
|
||||
| pointed to by `z0Ptr', `z1Ptr', and `z2Ptr'.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static inline void
|
||||
sub192(
|
||||
uint64_t a0,
|
||||
uint64_t a1,
|
||||
uint64_t a2,
|
||||
uint64_t b0,
|
||||
uint64_t b1,
|
||||
uint64_t b2,
|
||||
uint64_t *z0Ptr,
|
||||
uint64_t *z1Ptr,
|
||||
uint64_t *z2Ptr
|
||||
)
|
||||
{
|
||||
uint64_t z0, z1, z2;
|
||||
int8_t borrow0, borrow1;
|
||||
|
||||
z2 = a2 - b2;
|
||||
borrow1 = ( a2 < b2 );
|
||||
z1 = a1 - b1;
|
||||
borrow0 = ( a1 < b1 );
|
||||
z0 = a0 - b0;
|
||||
z0 -= ( z1 < borrow1 );
|
||||
z1 -= borrow1;
|
||||
z0 -= borrow0;
|
||||
*z2Ptr = z2;
|
||||
*z1Ptr = z1;
|
||||
*z0Ptr = z0;
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Multiplies `a' by `b' to obtain a 128-bit product. The product is broken
|
||||
| into two 64-bit pieces which are stored at the locations pointed to by
|
||||
| `z0Ptr' and `z1Ptr'.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static inline void mul64To128( uint64_t a, uint64_t b, uint64_t *z0Ptr, uint64_t *z1Ptr )
|
||||
{
|
||||
uint32_t aHigh, aLow, bHigh, bLow;
|
||||
uint64_t z0, zMiddleA, zMiddleB, z1;
|
||||
|
||||
aLow = a;
|
||||
aHigh = a>>32;
|
||||
bLow = b;
|
||||
bHigh = b>>32;
|
||||
z1 = ( (uint64_t) aLow ) * bLow;
|
||||
zMiddleA = ( (uint64_t) aLow ) * bHigh;
|
||||
zMiddleB = ( (uint64_t) aHigh ) * bLow;
|
||||
z0 = ( (uint64_t) aHigh ) * bHigh;
|
||||
zMiddleA += zMiddleB;
|
||||
z0 += ( ( (uint64_t) ( zMiddleA < zMiddleB ) )<<32 ) + ( zMiddleA>>32 );
|
||||
zMiddleA <<= 32;
|
||||
z1 += zMiddleA;
|
||||
z0 += ( z1 < zMiddleA );
|
||||
*z1Ptr = z1;
|
||||
*z0Ptr = z0;
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Multiplies the 128-bit value formed by concatenating `a0' and `a1' by
|
||||
| `b' to obtain a 192-bit product. The product is broken into three 64-bit
|
||||
| pieces which are stored at the locations pointed to by `z0Ptr', `z1Ptr', and
|
||||
| `z2Ptr'.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static inline void
|
||||
mul128By64To192(
|
||||
uint64_t a0,
|
||||
uint64_t a1,
|
||||
uint64_t b,
|
||||
uint64_t *z0Ptr,
|
||||
uint64_t *z1Ptr,
|
||||
uint64_t *z2Ptr
|
||||
)
|
||||
{
|
||||
uint64_t z0, z1, z2, more1;
|
||||
|
||||
mul64To128( a1, b, &z1, &z2 );
|
||||
mul64To128( a0, b, &z0, &more1 );
|
||||
add128( z0, more1, 0, z1, &z0, &z1 );
|
||||
*z2Ptr = z2;
|
||||
*z1Ptr = z1;
|
||||
*z0Ptr = z0;
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Multiplies the 128-bit value formed by concatenating `a0' and `a1' to the
|
||||
| 128-bit value formed by concatenating `b0' and `b1' to obtain a 256-bit
|
||||
| product. The product is broken into four 64-bit pieces which are stored at
|
||||
| the locations pointed to by `z0Ptr', `z1Ptr', `z2Ptr', and `z3Ptr'.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static inline void
|
||||
mul128To256(
|
||||
uint64_t a0,
|
||||
uint64_t a1,
|
||||
uint64_t b0,
|
||||
uint64_t b1,
|
||||
uint64_t *z0Ptr,
|
||||
uint64_t *z1Ptr,
|
||||
uint64_t *z2Ptr,
|
||||
uint64_t *z3Ptr
|
||||
)
|
||||
{
|
||||
uint64_t z0, z1, z2, z3;
|
||||
uint64_t more1, more2;
|
||||
|
||||
mul64To128( a1, b1, &z2, &z3 );
|
||||
mul64To128( a1, b0, &z1, &more2 );
|
||||
add128( z1, more2, 0, z2, &z1, &z2 );
|
||||
mul64To128( a0, b0, &z0, &more1 );
|
||||
add128( z0, more1, 0, z1, &z0, &z1 );
|
||||
mul64To128( a0, b1, &more1, &more2 );
|
||||
add128( more1, more2, 0, z2, &more1, &z2 );
|
||||
add128( z0, z1, 0, more1, &z0, &z1 );
|
||||
*z3Ptr = z3;
|
||||
*z2Ptr = z2;
|
||||
*z1Ptr = z1;
|
||||
*z0Ptr = z0;
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns an approximation to the 64-bit integer quotient obtained by dividing
|
||||
| `b' into the 128-bit value formed by concatenating `a0' and `a1'. The
|
||||
| divisor `b' must be at least 2^63. If q is the exact quotient truncated
|
||||
| toward zero, the approximation returned lies between q and q + 2 inclusive.
|
||||
| If the exact quotient q is larger than 64 bits, the maximum positive 64-bit
|
||||
| unsigned integer is returned.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static uint64_t estimateDiv128To64( uint64_t a0, uint64_t a1, uint64_t b )
|
||||
{
|
||||
uint64_t b0, b1;
|
||||
uint64_t rem0, rem1, term0, term1;
|
||||
uint64_t z;
|
||||
|
||||
if ( b <= a0 ) return LIT64( 0xFFFFFFFFFFFFFFFF );
|
||||
b0 = b>>32;
|
||||
z = ( b0<<32 <= a0 ) ? LIT64( 0xFFFFFFFF00000000 ) : ( a0 / b0 )<<32;
|
||||
mul64To128( b, z, &term0, &term1 );
|
||||
sub128( a0, a1, term0, term1, &rem0, &rem1 );
|
||||
while ( ( (int64_t) rem0 ) < 0 ) {
|
||||
z -= LIT64( 0x100000000 );
|
||||
b1 = b<<32;
|
||||
add128( rem0, rem1, b0, b1, &rem0, &rem1 );
|
||||
}
|
||||
rem0 = ( rem0<<32 ) | ( rem1>>32 );
|
||||
z |= ( b0<<32 <= rem0 ) ? 0xFFFFFFFF : rem0 / b0;
|
||||
return z;
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns an approximation to the square root of the 32-bit significand given
|
||||
| by `a'. Considered as an integer, `a' must be at least 2^31. If bit 0 of
|
||||
| `aExp' (the least significant bit) is 1, the integer returned approximates
|
||||
| 2^31*sqrt(`a'/2^31), where `a' is considered an integer. If bit 0 of `aExp'
|
||||
| is 0, the integer returned approximates 2^31*sqrt(`a'/2^30). In either
|
||||
| case, the approximation returned lies strictly within +/-2 of the exact
|
||||
| value.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static uint32_t estimateSqrt32( int16_t aExp, uint32_t a )
|
||||
{
|
||||
static const uint16_t sqrtOddAdjustments[] = {
|
||||
0x0004, 0x0022, 0x005D, 0x00B1, 0x011D, 0x019F, 0x0236, 0x02E0,
|
||||
0x039C, 0x0468, 0x0545, 0x0631, 0x072B, 0x0832, 0x0946, 0x0A67
|
||||
};
|
||||
static const uint16_t sqrtEvenAdjustments[] = {
|
||||
0x0A2D, 0x08AF, 0x075A, 0x0629, 0x051A, 0x0429, 0x0356, 0x029E,
|
||||
0x0200, 0x0179, 0x0109, 0x00AF, 0x0068, 0x0034, 0x0012, 0x0002
|
||||
};
|
||||
int8_t index;
|
||||
uint32_t z;
|
||||
|
||||
index = ( a>>27 ) & 15;
|
||||
if ( aExp & 1 ) {
|
||||
z = 0x4000 + ( a>>17 ) - sqrtOddAdjustments[ index ];
|
||||
z = ( ( a / z )<<14 ) + ( z<<15 );
|
||||
a >>= 1;
|
||||
}
|
||||
else {
|
||||
z = 0x8000 + ( a>>17 ) - sqrtEvenAdjustments[ index ];
|
||||
z = a / z + z;
|
||||
z = ( 0x20000 <= z ) ? 0xFFFF8000 : ( z<<15 );
|
||||
if ( z <= a ) return (uint32_t) ( ( (int32_t) a )>>1 );
|
||||
}
|
||||
return ( (uint32_t) ( ( ( (uint64_t) a )<<31 ) / z ) ) + ( z>>1 );
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns the number of leading 0 bits before the most-significant 1 bit of
|
||||
| `a'. If `a' is zero, 32 is returned.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static int8_t countLeadingZeros32( uint32_t a )
|
||||
{
|
||||
static const int8_t countLeadingZerosHigh[] = {
|
||||
8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4,
|
||||
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
|
||||
2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
|
||||
2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
|
||||
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
|
||||
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
|
||||
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
|
||||
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
|
||||
};
|
||||
int8_t shiftCount;
|
||||
|
||||
shiftCount = 0;
|
||||
if ( a < 0x10000 ) {
|
||||
shiftCount += 16;
|
||||
a <<= 16;
|
||||
}
|
||||
if ( a < 0x1000000 ) {
|
||||
shiftCount += 8;
|
||||
a <<= 8;
|
||||
}
|
||||
shiftCount += countLeadingZerosHigh[ a>>24 ];
|
||||
return shiftCount;
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns the number of leading 0 bits before the most-significant 1 bit of
|
||||
| `a'. If `a' is zero, 64 is returned.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static int8_t countLeadingZeros64( uint64_t a )
|
||||
{
|
||||
int8_t shiftCount;
|
||||
|
||||
shiftCount = 0;
|
||||
if ( a < ( (uint64_t) 1 )<<32 ) {
|
||||
shiftCount += 32;
|
||||
}
|
||||
else {
|
||||
a >>= 32;
|
||||
}
|
||||
shiftCount += countLeadingZeros32( a );
|
||||
return shiftCount;
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns 1 if the 128-bit value formed by concatenating `a0' and `a1'
|
||||
| is equal to the 128-bit value formed by concatenating `b0' and `b1'.
|
||||
| Otherwise, returns 0.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static inline bool eq128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 )
|
||||
{
|
||||
|
||||
return ( a0 == b0 ) && ( a1 == b1 );
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns 1 if the 128-bit value formed by concatenating `a0' and `a1' is less
|
||||
| than or equal to the 128-bit value formed by concatenating `b0' and `b1'.
|
||||
| Otherwise, returns 0.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static inline bool le128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 )
|
||||
{
|
||||
|
||||
return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 <= b1 ) );
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns 1 if the 128-bit value formed by concatenating `a0' and `a1' is less
|
||||
| than the 128-bit value formed by concatenating `b0' and `b1'. Otherwise,
|
||||
| returns 0.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static inline bool lt128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 )
|
||||
{
|
||||
|
||||
return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 < b1 ) );
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns 1 if the 128-bit value formed by concatenating `a0' and `a1' is
|
||||
| not equal to the 128-bit value formed by concatenating `b0' and `b1'.
|
||||
| Otherwise, returns 0.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static inline bool ne128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 )
|
||||
{
|
||||
|
||||
return ( a0 != b0 ) || ( a1 != b1 );
|
||||
|
||||
}
|
||||
|
||||
426
emu/softfloat-specialize.h
Normal file
426
emu/softfloat-specialize.h
Normal file
@ -0,0 +1,426 @@
|
||||
// This file was originally part of Berkeley Softfloat. It has been modified for use in iSH.
|
||||
|
||||
/*============================================================================
|
||||
|
||||
This C source fragment is part of the Berkeley SoftFloat IEEE Floating-Point
|
||||
Arithmetic Package, Release 2c, by John R. Hauser.
|
||||
|
||||
THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
|
||||
been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
|
||||
RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
|
||||
AND ORGANIZATIONS WHO CAN AND WILL TOLERATE ALL LOSSES, COSTS, OR OTHER
|
||||
PROBLEMS THEY INCUR DUE TO THE SOFTWARE WITHOUT RECOMPENSE FROM JOHN HAUSER OR
|
||||
THE INTERNATIONAL COMPUTER SCIENCE INSTITUTE, AND WHO FURTHERMORE EFFECTIVELY
|
||||
INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE INSTITUTE
|
||||
(possibly via similar legal notice) AGAINST ALL LOSSES, COSTS, OR OTHER
|
||||
PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE, OR
|
||||
INCURRED BY ANYONE DUE TO A DERIVATIVE WORK THEY CREATE USING ANY PART OF THE
|
||||
SOFTWARE.
|
||||
|
||||
Derivative works require also that (1) the source code for the derivative work
|
||||
includes prominent notice that the work is derivative, and (2) the source code
|
||||
includes prominent notice of these three paragraphs for those parts of this
|
||||
code that are retained.
|
||||
|
||||
=============================================================================*/
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Underflow tininess-detection mode, statically initialized to default value.
|
||||
| (The declaration in `softfloat.h' must match the `int8_t' type here.)
|
||||
*----------------------------------------------------------------------------*/
|
||||
int8_t float_detect_tininess = float_tininess_after_rounding;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Raises the exceptions specified by `flags'. Floating-point traps can be
|
||||
| defined here if desired. It is currently not possible for such a trap to
|
||||
| substitute a result value. If traps are not implemented, this routine
|
||||
| should be simply `float_exception_flags |= flags;'.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
void float_raise( int8_t flags )
|
||||
{
|
||||
|
||||
float_exception_flags |= flags;
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Internal canonical NaN format.
|
||||
*----------------------------------------------------------------------------*/
|
||||
typedef struct {
|
||||
bool sign;
|
||||
uint64_t signExp, signif;
|
||||
} commonNaNT;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| The pattern for a default generated single-precision NaN.
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define float32_default_nan 0xFFFFFFFF
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns 1 if the single-precision floating-point value `a' is a NaN;
|
||||
| otherwise returns 0.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
bool float32_is_nan( float32 a )
|
||||
{
|
||||
|
||||
return ( 0xFF000000 < (uint32_t) ( a<<1 ) );
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns 1 if the single-precision floating-point value `a' is a signaling
|
||||
| NaN; otherwise returns 0.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
bool float32_is_signaling_nan( float32 a )
|
||||
{
|
||||
|
||||
return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns the result of converting the single-precision floating-point NaN
|
||||
| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
|
||||
| exception is raised.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static commonNaNT float32ToCommonNaN( float32 a )
|
||||
{
|
||||
commonNaNT z;
|
||||
|
||||
if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
|
||||
z.sign = a>>31;
|
||||
z.signif = 0;
|
||||
z.signExp = ( (uint64_t) a )<<41;
|
||||
return z;
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns the result of converting the canonical NaN `a' to the single-
|
||||
| precision floating-point format.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static float32 commonNaNToFloat32( commonNaNT a )
|
||||
{
|
||||
|
||||
return ( ( (uint32_t) a.sign )<<31 ) | 0x7FC00000 | ( a.signExp>>41 );
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Takes two single-precision floating-point values `a' and `b', one of which
|
||||
| is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
|
||||
| signaling NaN, the invalid exception is raised.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static float32 propagateFloat32NaN( float32 a, float32 b )
|
||||
{
|
||||
bool aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
|
||||
|
||||
aIsNaN = float32_is_nan( a );
|
||||
aIsSignalingNaN = float32_is_signaling_nan( a );
|
||||
bIsNaN = float32_is_nan( b );
|
||||
bIsSignalingNaN = float32_is_signaling_nan( b );
|
||||
a |= 0x00400000;
|
||||
b |= 0x00400000;
|
||||
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
|
||||
if ( aIsNaN ) {
|
||||
return ( aIsSignalingNaN & bIsNaN ) ? b : a;
|
||||
}
|
||||
else {
|
||||
return b;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| The pattern for a default generated double-precision NaN.
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define float64_default_nan LIT64( 0xFFFFFFFFFFFFFFFF )
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns 1 if the double-precision floating-point value `a' is a NaN;
|
||||
| otherwise returns 0.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
bool float64_is_nan( float64 a )
|
||||
{
|
||||
|
||||
return ( LIT64( 0xFFE0000000000000 ) < (uint64_t) ( a<<1 ) );
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns 1 if the double-precision floating-point value `a' is a signaling
|
||||
| NaN; otherwise returns 0.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
bool float64_is_signaling_nan( float64 a )
|
||||
{
|
||||
|
||||
return
|
||||
( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
|
||||
&& ( a & LIT64( 0x0007FFFFFFFFFFFF ) );
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns the result of converting the double-precision floating-point NaN
|
||||
| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
|
||||
| exception is raised.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static commonNaNT float64ToCommonNaN( float64 a )
|
||||
{
|
||||
commonNaNT z;
|
||||
|
||||
if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
|
||||
z.sign = a>>63;
|
||||
z.signif = 0;
|
||||
z.signExp = a<<12;
|
||||
return z;
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns the result of converting the canonical NaN `a' to the double-
|
||||
| precision floating-point format.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static float64 commonNaNToFloat64( commonNaNT a )
|
||||
{
|
||||
|
||||
return
|
||||
( ( (uint64_t) a.sign )<<63 )
|
||||
| LIT64( 0x7FF8000000000000 )
|
||||
| ( a.signExp>>12 );
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Takes two double-precision floating-point values `a' and `b', one of which
|
||||
| is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
|
||||
| signaling NaN, the invalid exception is raised.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static float64 propagateFloat64NaN( float64 a, float64 b )
|
||||
{
|
||||
bool aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
|
||||
|
||||
aIsNaN = float64_is_nan( a );
|
||||
aIsSignalingNaN = float64_is_signaling_nan( a );
|
||||
bIsNaN = float64_is_nan( b );
|
||||
bIsSignalingNaN = float64_is_signaling_nan( b );
|
||||
a |= LIT64( 0x0008000000000000 );
|
||||
b |= LIT64( 0x0008000000000000 );
|
||||
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
|
||||
if ( aIsNaN ) {
|
||||
return ( aIsSignalingNaN & bIsNaN ) ? b : a;
|
||||
}
|
||||
else {
|
||||
return b;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
#ifdef FLOATX80
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| The pattern for a default generated double-extended-precision NaN.
|
||||
| The `signExp' and `signif' values hold the most- and least-significant bits,
|
||||
| respectively.
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define floatx80_default_nan_high 0xFFFF
|
||||
#define floatx80_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF )
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns 1 if the double-extended-precision floating-point value `a' is a
|
||||
| NaN; otherwise returns 0.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
bool floatx80_is_nan( floatx80 a )
|
||||
{
|
||||
|
||||
return ( ( a.signExp & 0x7FFF ) == 0x7FFF ) && (uint64_t) ( a.signif<<1 );
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns 1 if the double-extended-precision floating-point value `a' is a
|
||||
| signaling NaN; otherwise returns 0.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
bool floatx80_is_signaling_nan( floatx80 a )
|
||||
{
|
||||
uint64_t aLow;
|
||||
|
||||
aLow = a.signif & ~ LIT64( 0x4000000000000000 );
|
||||
return
|
||||
( ( a.signExp & 0x7FFF ) == 0x7FFF )
|
||||
&& (uint64_t) ( aLow<<1 )
|
||||
&& ( a.signif == aLow );
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns the result of converting the double-extended-precision floating-
|
||||
| point NaN `a' to the canonical NaN format. If `a' is a signaling NaN, the
|
||||
| invalid exception is raised.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static commonNaNT floatx80ToCommonNaN( floatx80 a )
|
||||
{
|
||||
commonNaNT z;
|
||||
|
||||
if ( floatx80_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
|
||||
z.sign = a.signExp>>15;
|
||||
z.signif = 0;
|
||||
z.signExp = a.signif<<1;
|
||||
return z;
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns the result of converting the canonical NaN `a' to the double-
|
||||
| extended-precision floating-point format.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static floatx80 commonNaNToFloatx80( commonNaNT a )
|
||||
{
|
||||
floatx80 z;
|
||||
|
||||
z.signif = LIT64( 0xC000000000000000 ) | ( a.signExp>>1 );
|
||||
z.signExp = ( ( (uint16_t) a.sign )<<15 ) | 0x7FFF;
|
||||
return z;
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Takes two double-extended-precision floating-point values `a' and `b', one
|
||||
| of which is a NaN, and returns the appropriate NaN result. If either `a' or
|
||||
| `b' is a signaling NaN, the invalid exception is raised.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static floatx80 propagateFloatx80NaN( floatx80 a, floatx80 b )
|
||||
{
|
||||
bool aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
|
||||
|
||||
aIsNaN = floatx80_is_nan( a );
|
||||
aIsSignalingNaN = floatx80_is_signaling_nan( a );
|
||||
bIsNaN = floatx80_is_nan( b );
|
||||
bIsSignalingNaN = floatx80_is_signaling_nan( b );
|
||||
a.signif |= LIT64( 0xC000000000000000 );
|
||||
b.signif |= LIT64( 0xC000000000000000 );
|
||||
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
|
||||
if ( aIsNaN ) {
|
||||
return ( aIsSignalingNaN & bIsNaN ) ? b : a;
|
||||
}
|
||||
else {
|
||||
return b;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef FLOAT128
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| The pattern for a default generated quadruple-precision NaN. The `signExp' and
|
||||
| `signif' values hold the most- and least-significant bits, respectively.
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define float128_default_nan_high LIT64( 0xFFFFFFFFFFFFFFFF )
|
||||
#define float128_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF )
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns 1 if the quadruple-precision floating-point value `a' is a NaN;
|
||||
| otherwise returns 0.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
bool float128_is_nan( float128 a )
|
||||
{
|
||||
|
||||
return
|
||||
( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.signExp<<1 ) )
|
||||
&& ( a.signif || ( a.signExp & LIT64( 0x0000FFFFFFFFFFFF ) ) );
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns 1 if the quadruple-precision floating-point value `a' is a
|
||||
| signaling NaN; otherwise returns 0.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
bool float128_is_signaling_nan( float128 a )
|
||||
{
|
||||
|
||||
return
|
||||
( ( ( a.signExp>>47 ) & 0xFFFF ) == 0xFFFE )
|
||||
&& ( a.signif || ( a.signExp & LIT64( 0x00007FFFFFFFFFFF ) ) );
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns the result of converting the quadruple-precision floating-point NaN
|
||||
| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
|
||||
| exception is raised.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static commonNaNT float128ToCommonNaN( float128 a )
|
||||
{
|
||||
commonNaNT z;
|
||||
|
||||
if ( float128_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
|
||||
z.sign = a.signExp>>63;
|
||||
shortShift128Left( a.signExp, a.signif, 16, &z.signExp, &z.signif );
|
||||
return z;
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Returns the result of converting the canonical NaN `a' to the quadruple-
|
||||
| precision floating-point format.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static float128 commonNaNToFloat128( commonNaNT a )
|
||||
{
|
||||
float128 z;
|
||||
|
||||
shift128Right( a.signExp, a.signif, 16, &z.signExp, &z.signif );
|
||||
z.signExp |= ( ( (uint64_t) a.sign )<<63 ) | LIT64( 0x7FFF800000000000 );
|
||||
return z;
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Takes two quadruple-precision floating-point values `a' and `b', one of
|
||||
| which is a NaN, and returns the appropriate NaN result. If either `a' or
|
||||
| `b' is a signaling NaN, the invalid exception is raised.
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
static float128 propagateFloat128NaN( float128 a, float128 b )
|
||||
{
|
||||
bool aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
|
||||
|
||||
aIsNaN = float128_is_nan( a );
|
||||
aIsSignalingNaN = float128_is_signaling_nan( a );
|
||||
bIsNaN = float128_is_nan( b );
|
||||
bIsSignalingNaN = float128_is_signaling_nan( b );
|
||||
a.signExp |= LIT64( 0x0000800000000000 );
|
||||
b.signExp |= LIT64( 0x0000800000000000 );
|
||||
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
|
||||
if ( aIsNaN ) {
|
||||
return ( aIsSignalingNaN & bIsNaN ) ? b : a;
|
||||
}
|
||||
else {
|
||||
return b;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
5161
emu/softfloat.c
Normal file
5161
emu/softfloat.c
Normal file
File diff suppressed because it is too large
Load Diff
270
emu/softfloat.h
Normal file
270
emu/softfloat.h
Normal file
@ -0,0 +1,270 @@
|
||||
// This file was originally part of Berkeley Softfloat. It has been modified for use in iSH.
|
||||
|
||||
/*============================================================================
|
||||
|
||||
This C header file template is part of the Berkeley SoftFloat IEEE Floating-
|
||||
Point Arithmetic Package, Release 2c, by John R. Hauser.
|
||||
|
||||
THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
|
||||
been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
|
||||
RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
|
||||
AND ORGANIZATIONS WHO CAN AND WILL TOLERATE ALL LOSSES, COSTS, OR OTHER
|
||||
PROBLEMS THEY INCUR DUE TO THE SOFTWARE WITHOUT RECOMPENSE FROM JOHN HAUSER OR
|
||||
THE INTERNATIONAL COMPUTER SCIENCE INSTITUTE, AND WHO FURTHERMORE EFFECTIVELY
|
||||
INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE INSTITUTE
|
||||
(possibly via similar legal notice) AGAINST ALL LOSSES, COSTS, OR OTHER
|
||||
PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE, OR
|
||||
INCURRED BY ANYONE DUE TO A DERIVATIVE WORK THEY CREATE USING ANY PART OF THE
|
||||
SOFTWARE.
|
||||
|
||||
Derivative works require also that (1) the source code for the derivative work
|
||||
includes prominent notice that the work is derivative, and (2) the source code
|
||||
includes prominent notice of these three paragraphs for those parts of this
|
||||
code that are retained.
|
||||
|
||||
=============================================================================*/
|
||||
|
||||
#ifndef SOFTFLOAT_H
|
||||
#define SOFTFLOAT_H
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| The macro `FLOATX80' must be defined to enable the double-extended-precision
|
||||
| floating-point format `floatx80'. If this macro is not defined, the
|
||||
| `floatx80' type will not be defined, and none of the functions that either
|
||||
| input or output the `floatx80' type will be defined. The same applies to
|
||||
| the `FLOAT128' macro and the quadruple-precision format `float128'.
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define FLOATX80
|
||||
#define FLOAT128
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
#define LIT64( a ) a##LL
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Software IEEE floating-point types.
|
||||
*----------------------------------------------------------------------------*/
|
||||
typedef uint32_t float32;
|
||||
typedef uint64_t float64;
|
||||
#ifdef FLOATX80
|
||||
typedef struct {
|
||||
uint16_t signExp;
|
||||
uint64_t signif;
|
||||
} floatx80;
|
||||
#endif
|
||||
#ifdef FLOAT128
|
||||
typedef struct {
|
||||
uint64_t signExp, signif;
|
||||
} float128;
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Software IEEE floating-point underflow tininess-detection mode.
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern int8_t float_detect_tininess;
|
||||
enum {
|
||||
float_tininess_after_rounding = 0,
|
||||
float_tininess_before_rounding = 1
|
||||
};
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Software IEEE floating-point rounding mode.
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern int8_t float_rounding_mode;
|
||||
enum {
|
||||
float_round_nearest_even = 0,
|
||||
float_round_to_zero = 1,
|
||||
float_round_down = 2,
|
||||
float_round_up = 3
|
||||
};
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Software IEEE floating-point exception flags.
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern int8_t float_exception_flags;
|
||||
enum {
|
||||
float_flag_inexact = 1,
|
||||
float_flag_underflow = 2,
|
||||
float_flag_overflow = 4,
|
||||
float_flag_divbyzero = 8,
|
||||
float_flag_invalid = 16
|
||||
};
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Routine to raise any or all of the software IEEE floating-point exception
|
||||
| flags.
|
||||
*----------------------------------------------------------------------------*/
|
||||
void float_raise( int8_t );
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Software IEEE integer-to-floating-point conversion routines.
|
||||
*----------------------------------------------------------------------------*/
|
||||
float32 int32_to_float32( int32_t );
|
||||
float64 int32_to_float64( int32_t );
|
||||
#ifdef FLOATX80
|
||||
floatx80 int32_to_floatx80( int32_t );
|
||||
#endif
|
||||
#ifdef FLOAT128
|
||||
float128 int32_to_float128( int32_t );
|
||||
#endif
|
||||
float32 int64_to_float32( int64_t );
|
||||
float64 int64_to_float64( int64_t );
|
||||
#ifdef FLOATX80
|
||||
floatx80 int64_to_floatx80( int64_t );
|
||||
#endif
|
||||
#ifdef FLOAT128
|
||||
float128 int64_to_float128( int64_t );
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Software IEEE single-precision conversion routines.
|
||||
*----------------------------------------------------------------------------*/
|
||||
int32_t float32_to_int32( float32 );
|
||||
int32_t float32_to_int32_round_to_zero( float32 );
|
||||
int64_t float32_to_int64( float32 );
|
||||
int64_t float32_to_int64_round_to_zero( float32 );
|
||||
float64 float32_to_float64( float32 );
|
||||
#ifdef FLOATX80
|
||||
floatx80 float32_to_floatx80( float32 );
|
||||
#endif
|
||||
#ifdef FLOAT128
|
||||
float128 float32_to_float128( float32 );
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Software IEEE single-precision operations.
|
||||
*----------------------------------------------------------------------------*/
|
||||
float32 float32_round_to_int( float32 );
|
||||
float32 float32_add( float32, float32 );
|
||||
float32 float32_sub( float32, float32 );
|
||||
float32 float32_mul( float32, float32 );
|
||||
float32 float32_div( float32, float32 );
|
||||
float32 float32_rem( float32, float32 );
|
||||
float32 float32_sqrt( float32 );
|
||||
bool float32_eq( float32, float32 );
|
||||
bool float32_le( float32, float32 );
|
||||
bool float32_lt( float32, float32 );
|
||||
bool float32_eq_signaling( float32, float32 );
|
||||
bool float32_le_quiet( float32, float32 );
|
||||
bool float32_lt_quiet( float32, float32 );
|
||||
bool float32_is_signaling_nan( float32 );
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Software IEEE double-precision conversion routines.
|
||||
*----------------------------------------------------------------------------*/
|
||||
int32_t float64_to_int32( float64 );
|
||||
int32_t float64_to_int32_round_to_zero( float64 );
|
||||
int64_t float64_to_int64( float64 );
|
||||
int64_t float64_to_int64_round_to_zero( float64 );
|
||||
float32 float64_to_float32( float64 );
|
||||
#ifdef FLOATX80
|
||||
floatx80 float64_to_floatx80( float64 );
|
||||
#endif
|
||||
#ifdef FLOAT128
|
||||
float128 float64_to_float128( float64 );
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Software IEEE double-precision operations.
|
||||
*----------------------------------------------------------------------------*/
|
||||
float64 float64_round_to_int( float64 );
|
||||
float64 float64_add( float64, float64 );
|
||||
float64 float64_sub( float64, float64 );
|
||||
float64 float64_mul( float64, float64 );
|
||||
float64 float64_div( float64, float64 );
|
||||
float64 float64_rem( float64, float64 );
|
||||
float64 float64_sqrt( float64 );
|
||||
bool float64_eq( float64, float64 );
|
||||
bool float64_le( float64, float64 );
|
||||
bool float64_lt( float64, float64 );
|
||||
bool float64_eq_signaling( float64, float64 );
|
||||
bool float64_le_quiet( float64, float64 );
|
||||
bool float64_lt_quiet( float64, float64 );
|
||||
bool float64_is_signaling_nan( float64 );
|
||||
|
||||
#ifdef FLOATX80
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Software IEEE double-extended-precision conversion routines.
|
||||
*----------------------------------------------------------------------------*/
|
||||
int32_t floatx80_to_int32( floatx80 );
|
||||
int32_t floatx80_to_int32_round_to_zero( floatx80 );
|
||||
int64_t floatx80_to_int64( floatx80 );
|
||||
int64_t floatx80_to_int64_round_to_zero( floatx80 );
|
||||
float32 floatx80_to_float32( floatx80 );
|
||||
float64 floatx80_to_float64( floatx80 );
|
||||
#ifdef FLOAT128
|
||||
float128 floatx80_to_float128( floatx80 );
|
||||
#endif
|
||||
|
||||
static inline void floatx80_neg(floatx80 f) {
|
||||
f.signExp ^= 1 << 15; // flip the sign bit
|
||||
}
|
||||
|
||||
static inline void floatx80_abs(floatx80 f) {
|
||||
f.signExp &= ~(1 << 15); // clear the sign bit
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Software IEEE double-extended-precision rounding precision. Valid values
|
||||
| are 32, 64, and 80.
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern int8_t floatx80_rounding_precision;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Software IEEE double-extended-precision operations.
|
||||
*----------------------------------------------------------------------------*/
|
||||
floatx80 floatx80_round_to_int( floatx80 );
|
||||
floatx80 floatx80_add( floatx80, floatx80 );
|
||||
floatx80 floatx80_sub( floatx80, floatx80 );
|
||||
floatx80 floatx80_mul( floatx80, floatx80 );
|
||||
floatx80 floatx80_div( floatx80, floatx80 );
|
||||
floatx80 floatx80_rem( floatx80, floatx80 );
|
||||
floatx80 floatx80_sqrt( floatx80 );
|
||||
bool floatx80_eq( floatx80, floatx80 );
|
||||
bool floatx80_le( floatx80, floatx80 );
|
||||
bool floatx80_lt( floatx80, floatx80 );
|
||||
bool floatx80_eq_signaling( floatx80, floatx80 );
|
||||
bool floatx80_le_quiet( floatx80, floatx80 );
|
||||
bool floatx80_lt_quiet( floatx80, floatx80 );
|
||||
bool floatx80_is_signaling_nan( floatx80 );
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef FLOAT128
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Software IEEE quadruple-precision conversion routines.
|
||||
*----------------------------------------------------------------------------*/
|
||||
int32_t float128_to_int32( float128 );
|
||||
int32_t float128_to_int32_round_to_zero( float128 );
|
||||
int64_t float128_to_int64( float128 );
|
||||
int64_t float128_to_int64_round_to_zero( float128 );
|
||||
float32 float128_to_float32( float128 );
|
||||
float64 float128_to_float64( float128 );
|
||||
#ifdef FLOATX80
|
||||
floatx80 float128_to_floatx80( float128 );
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
| Software IEEE quadruple-precision operations.
|
||||
*----------------------------------------------------------------------------*/
|
||||
float128 float128_round_to_int( float128 );
|
||||
float128 float128_add( float128, float128 );
|
||||
float128 float128_sub( float128, float128 );
|
||||
float128 float128_mul( float128, float128 );
|
||||
float128 float128_div( float128, float128 );
|
||||
float128 float128_rem( float128, float128 );
|
||||
float128 float128_sqrt( float128 );
|
||||
bool float128_eq( float128, float128 );
|
||||
bool float128_le( float128, float128 );
|
||||
bool float128_lt( float128, float128 );
|
||||
bool float128_eq_signaling( float128, float128 );
|
||||
bool float128_le_quiet( float128, float128 );
|
||||
bool float128_lt_quiet( float128, float128 );
|
||||
bool float128_is_signaling_nan( float128 );
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@ -28,7 +28,6 @@ threads = dependency('threads')
|
||||
librt = cc.find_library('rt', required: false)
|
||||
|
||||
gdbm = subproject('gdbm').get_variable('gdbm')
|
||||
softfloat = subproject('softfloat').get_variable('softfloat_dep')
|
||||
|
||||
subdir('vdso') # ish depends on the vdso
|
||||
|
||||
@ -90,6 +89,7 @@ src = [
|
||||
|
||||
'emu/memory.c',
|
||||
'emu/tlb.c',
|
||||
'emu/softfloat.c',
|
||||
cified_vdso,
|
||||
]
|
||||
if get_option('jit')
|
||||
@ -114,10 +114,10 @@ endif
|
||||
|
||||
libish = library('ish', src,
|
||||
include_directories: includes,
|
||||
dependencies: [librt, threads, softfloat, gdbm])
|
||||
dependencies: [librt, threads, gdbm])
|
||||
ish = declare_dependency(
|
||||
link_with: libish,
|
||||
dependencies: [librt, threads, softfloat, gdbm],
|
||||
dependencies: [librt, threads, gdbm],
|
||||
include_directories: includes)
|
||||
|
||||
# ptraceomatic et al
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user