mirror of
https://github.com/acidanthera/OpenCorePkg.git
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135 lines
4.0 KiB
C
Executable File
135 lines
4.0 KiB
C
Executable File
/** @file
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Copyright (C) 2016, The HermitCrabs Lab. All rights reserved.
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All rights reserved.
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <Uefi.h>
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#include <IndustryStandard/GenericIch.h>
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#include <IndustryStandard/Pci.h>
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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#include <Library/IoLib.h>
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#include <Library/PciLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Macros.h>
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UINT64 mTimerLibTscFrequency = 0;
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// CalculateTSC
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/** Calculate the TSC frequency
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@param[in] Recalculate The firmware allocated handle for the EFI image.
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@retval The calculated TSC frequency.
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**/
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UINT64
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CalculateTSC (
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IN BOOLEAN Recalculate
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)
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{
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UINT32 TimerAddr;
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UINT64 Tsc0;
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UINT64 Tsc1;
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UINT64 AcpiTick0;
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UINT64 AcpiTick1;
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UINT64 AcpiTicksDelta;
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UINT32 AcpiTicksTarget;
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UINT32 TimerResolution;
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// Already Calculated, Return Cached Result
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if (((mTimerLibTscFrequency == 0) || Recalculate) && PciRead16 (PCI_ICH_LPC_ADDRESS (0)) == 0x8086) {
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TimerAddr = 0;
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TimerResolution = 10;
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// Check if ACPI I/O Space Is Enabled On LPC device
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if ((PciRead8 (PCI_ICH_LPC_ADDRESS (R_ICH_LPC_ACPI_CNT)) & B_ICH_LPC_ACPI_CNT_ACPI_EN) != 0) {
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TimerAddr = ((PciRead16 (PCI_ICH_LPC_ADDRESS (R_ICH_LPC_ACPI_BASE)) & B_ICH_LPC_ACPI_BASE_BAR) + R_ACPI_PM1_TMR);
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//DEBUG ((DEBUG_INFO, "Acpi Timer Addr 0x%0x (LPC)\n", TimerAddr));
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} else {
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// Starting from Intel Sunrisepoint (Skylake PCH) the iTCO watchdog resources
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// have been moved to reside under the i801 SMBus host controller whereas
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// previously they were under the LPC device.
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//
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// Check if ACPI I/O space is enabled on SMBUS device
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if ((PciRead8 (PCI_ICH_SMBUS_ADDRESS (R_ICH_SMBUS_ACPI_CNT)) & B_ICH_SMBUS_ACPI_CNT_ACPI_EN) != 0) {
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TimerAddr = ((PciRead16 (PCI_ICH_SMBUS_ADDRESS (R_ICH_SMBUS_ACPI_BASE)) & B_ICH_SMBUS_ACPI_BASE_BAR) + R_ACPI_PM1_TMR);
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//DEBUG ((DEBUG_INFO, "Acpi Timer Addr 0x%0x (SMB)\n", TimerAddr));
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}
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}
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if (TimerAddr != 0) {
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mTimerLibTscFrequency = 0;
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// Check That Timer Is Advancing
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AcpiTick0 = IoRead32 (TimerAddr);
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gBS->Stall (500);
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AcpiTick1 = IoRead32 (TimerAddr);
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if (AcpiTick0 != AcpiTick1) {
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// ACPI PM timers are usually of 24-bit length, but there are some less common cases of 32-bit length also.
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// When the maximal number is reached, it overflows.
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// The code below can handle overflow with AcpiTicksTarget of up to 24-bit size,
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// on both available sizes of ACPI PM Timers (24-bit and 32-bit).
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//
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// 357954 clocks of ACPI timer (100ms)
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AcpiTicksTarget = (V_ACPI_TMR_FREQUENCY / TimerResolution);
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AcpiTick0 = IoRead32 (TimerAddr);
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Tsc0 = AsmReadTsc ();
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do {
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CpuPause ();
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// Check How Many AcpiTicks Have Passed Since We Started
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AcpiTick1 = IoRead32 (TimerAddr);
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if (AcpiTick0 <= AcpiTick1) {
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// No Overflow
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AcpiTicksDelta = (AcpiTick1 - AcpiTick0);
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} else if ((AcpiTick0 - AcpiTick1) <= 0x00FFFFFF) {
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// Overflow, 24 Bit Timer
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AcpiTicksDelta = ((0x00FFFFFF - AcpiTick0) + AcpiTick1);
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} else {
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// Overflow, 32 Bit Timer
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AcpiTicksDelta = ((MAX_UINT32 - AcpiTick0) + AcpiTick1);
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}
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// Keep Checking Acpi ticks Until Target Is Reached
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} while (AcpiTicksDelta < AcpiTicksTarget);
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Tsc1 = AsmReadTsc ();
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mTimerLibTscFrequency = MultU64x32 ((Tsc1 - Tsc0), TimerResolution);
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}
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}
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}
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//DEBUG ((DEBUG_INFO, "TscFrequency %lld\n", mTimerLibTscFrequency));
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return mTimerLibTscFrequency;
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}
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