mirror of
https://github.com/acidanthera/OpenCorePkg.git
synced 2025-12-08 19:25:01 +00:00
216 lines
6.0 KiB
C
216 lines
6.0 KiB
C
/** @file
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Copyright (C) 2021, PMheart. All rights reserved.
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All rights reserved.
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/PrintLib.h>
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#include <Library/OcDeviceMiscLib.h>
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#include <Library/OcStringLib.h>
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EFI_STATUS
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OcCpuInfoDump (
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IN OC_CPU_INFO *CpuInfo,
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IN EFI_FILE_PROTOCOL *Root
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)
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{
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EFI_STATUS Status;
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OC_CPU_MSR_REPORT *Reports;
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UINTN EntryCount;
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UINTN Index;
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CHAR8 *FileBuffer;
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UINTN FileBufferSize;
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CHAR16 TmpFileName[32];
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ASSERT (CpuInfo != NULL);
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ASSERT (Root != NULL);
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FileBufferSize = SIZE_1KB;
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FileBuffer = (CHAR8 *)AllocateZeroPool (FileBufferSize);
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if (FileBuffer == NULL) {
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return EFI_OUT_OF_RESOURCES;
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}
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//
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// Firstly, dump basic CPU info.
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//
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OcAsciiPrintBuffer (
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&FileBuffer,
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&FileBufferSize,
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"CPU BrandString: %a\nMicrocodeRevision: 0x%08X\nVirtualization %d\n",
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CpuInfo->BrandString,
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CpuInfo->MicrocodeRevision,
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CpuInfo->Hypervisor
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);
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OcAsciiPrintBuffer (
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&FileBuffer,
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&FileBufferSize,
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"CPUID %08X %08X %08X %08X\nExtSigEcx %08X\nExtSigEdx %08X\n",
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CpuInfo->CpuidVerEax.Uint32,
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CpuInfo->CpuidVerEbx.Uint32,
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CpuInfo->CpuidVerEcx.Uint32,
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CpuInfo->CpuidVerEdx.Uint32,
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CpuInfo->CpuidExtSigEcx.Uint32,
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CpuInfo->CpuidExtSigEdx.Uint32
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);
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OcAsciiPrintBuffer (
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&FileBuffer,
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&FileBufferSize,
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"Type 0x%02X\nFamily 0x%02X\nModel 0x%02X\nExtModel 0x%02X\nExtFamily 0x%02X\nStepping 0x%02X\n",
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CpuInfo->Type,
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CpuInfo->Family,
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CpuInfo->Model,
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CpuInfo->ExtModel,
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CpuInfo->ExtFamily,
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CpuInfo->Stepping
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);
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OcAsciiPrintBuffer (
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&FileBuffer,
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&FileBufferSize,
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"Features 0x%16LX\nExtFeatures 0x%16LX\nSignature 0x%08X\n",
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CpuInfo->Features,
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CpuInfo->ExtFeatures,
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CpuInfo->Signature
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);
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OcAsciiPrintBuffer (
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&FileBuffer,
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&FileBufferSize,
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"Brand 0x%02X\nAppleProcessorType 0x%04X\nCstConfigLock %d\nCpuGeneration %d\n",
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CpuInfo->Brand,
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CpuInfo->AppleProcessorType,
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CpuInfo->CstConfigLock,
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CpuInfo->CpuGeneration
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);
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OcAsciiPrintBuffer (
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&FileBuffer,
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&FileBufferSize,
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"MaxId 0x%08X\nMaxExtId 0x%08X\n",
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CpuInfo->MaxId,
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CpuInfo->MaxExtId
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);
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OcAsciiPrintBuffer (
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&FileBuffer,
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&FileBufferSize,
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"PackageCount %u\nCoreCount %u\nThreadCount %u\n",
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CpuInfo->PackageCount,
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CpuInfo->CoreCount,
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CpuInfo->ThreadCount
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);
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OcAsciiPrintBuffer (
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&FileBuffer,
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&FileBufferSize,
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"ExternalClock %u\n",
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CpuInfo->ExternalClock
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);
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OcAsciiPrintBuffer (
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&FileBuffer,
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&FileBufferSize,
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"ARTFrequency %Lu\nCPUFrequency %Lu\nCPUFrequencyFromTSC %Lu\nCPUFrequencyFromART %Lu\nTscAdjust %Lu\nCPUFrequencyFromApple %Lu\nCPUFrequencyFromVMT %Lu\nFSBFrequency %Lu\n\n",
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CpuInfo->ARTFrequency,
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CpuInfo->CPUFrequency,
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CpuInfo->CPUFrequencyFromTSC,
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CpuInfo->CPUFrequencyFromART,
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CpuInfo->TscAdjust,
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CpuInfo->CPUFrequencyFromApple,
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CpuInfo->CPUFrequencyFromVMT,
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CpuInfo->FSBFrequency
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);
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//
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// Then, get reports of MSR status.
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//
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Reports = OcCpuGetMsrReports (CpuInfo, &EntryCount);
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if (Reports == NULL) {
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return EFI_UNSUPPORTED;
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}
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for (Index = 0; Index < EntryCount; ++Index) {
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OcAsciiPrintBuffer (&FileBuffer, &FileBufferSize, "CPU%02u:\n", Index);
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//
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// MSR_PLATFORM_INFO
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//
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if (Reports[Index].CpuHasMsrPlatformInfo) {
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OcAsciiPrintBuffer (&FileBuffer, &FileBufferSize, "MSR_PLATFORM_INFO: 0x%llX\n", Reports[Index].CpuMsrPlatformInfoValue);
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}
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//
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// MSR_TURBO_RATIO_LIMIT
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//
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if (Reports[Index].CpuHasMsrTurboRatioLimit) {
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OcAsciiPrintBuffer (&FileBuffer, &FileBufferSize, "MSR_TURBO_RATIO_LIMIT: 0x%llX\n", Reports[Index].CpuMsrTurboRatioLimitValue);
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}
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//
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// MSR_PKG_POWER_INFO (TODO: To be confirmed)
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//
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if (Reports[Index].CpuHasMsrPkgPowerInfo) {
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OcAsciiPrintBuffer (&FileBuffer, &FileBufferSize, "MSR_PKG_POWER_INFO: 0x%llX\n", Reports[Index].CpuMsrPkgPowerInfoValue);
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}
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//
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// MSR_BROADWELL_PKG_CST_CONFIG_CONTROL_REGISTER (0xE2)
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//
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if (Reports[Index].CpuHasMsrE2) {
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OcAsciiPrintBuffer (&FileBuffer, &FileBufferSize, "MSR_BROADWELL_PKG_CST_CONFIG_CONTROL_REGISTER (0xE2): 0x%llX\n", Reports[Index].CpuMsrPkgPowerInfoValue);
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}
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//
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// MSR_IA32_MISC_ENABLE
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//
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if (Reports[Index].CpuHasMsrIa32MiscEnable) {
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OcAsciiPrintBuffer (&FileBuffer, &FileBufferSize, "MSR_IA32_MISC_ENABLE: 0x%llX\n", Reports[Index].CpuMsrIa32MiscEnableValue);
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}
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//
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// MSR_IA32_EXT_CONFIG
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//
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if (Reports[Index].CpuHasMsrIa32ExtConfig) {
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OcAsciiPrintBuffer (&FileBuffer, &FileBufferSize, "MSR_IA32_EXT_CONFIG: 0x%llX\n", Reports[Index].CpuMsrIa32ExtConfigValue);
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}
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//
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// MSR_FSB_FREQ
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//
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if (Reports[Index].CpuHasMsrFsbFreq) {
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OcAsciiPrintBuffer (&FileBuffer, &FileBufferSize, "MSR_FSB_FREQ: 0x%llX\n", Reports[Index].CpuMsrFsbFreqValue);
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}
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//
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// MSR_IA32_PERF_STATUS
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//
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if (Reports[Index].CpuHasMsrIa32PerfStatus) {
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OcAsciiPrintBuffer (&FileBuffer, &FileBufferSize, "MSR_IA32_PERF_STATUS: 0x%llX\n", Reports[Index].CpuMsrIa32PerfStatusValue);
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}
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OcAsciiPrintBuffer (&FileBuffer, &FileBufferSize, "\n");
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}
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//
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// Save dumped CPU info to file.
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//
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if (FileBuffer != NULL) {
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UnicodeSPrint (TmpFileName, sizeof (TmpFileName), L"CPUInfo.txt");
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Status = OcSetFileData (Root, TmpFileName, FileBuffer, (UINT32)AsciiStrLen (FileBuffer));
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DEBUG ((DEBUG_INFO, "OCDM: Dumped CPU info - %r\n", Status));
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FreePool (FileBuffer);
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}
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FreePool (Reports);
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return EFI_SUCCESS;
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}
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