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https://github.com/acidanthera/OpenCorePkg.git
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0fdae4322d
We cannot use BaseMemoryLibOptDxe since it uses SSE instructions, and some firmwares fail to properly maintain MMX register contexts across the timers. This results in exceptions when trying to execute primitives like CopyMem in timers (e.g. AIKDataWriteEntry). Reproduced on ASUS M5A97 with AMD FX8320 CPU. closes acidanthera/bugtracker#754
103 lines
2.9 KiB
C
103 lines
2.9 KiB
C
/** @file
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Check memory routine compatibility.
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Copyright (c) 2018, vit9696. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <Uefi.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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#include <Library/OcMiscLib.h>
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#include <Library/UefiLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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STATIC UINT8 mSource[64];
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STATIC UINT8 mDestination[64];
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EFI_STATUS
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EFIAPI
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UefiMain (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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)
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{
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UINT8 *Src;
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UINT8 *Dst;
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UINT32 Size;
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IA32_CR0 Cr0;
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IA32_CR4 Cr4;
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IA32_EFLAGS32 Flags;
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Src = ALIGN_POINTER (mSource, 16);
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Dst = ALIGN_POINTER (mDestination, 16);
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Size = 32;
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gST->ConOut->OutputString (gST->ConOut, L"VerifyMemOpt\r\n");
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gBS->Stall (SECONDS_TO_MICROSECONDS (1));
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Cr0.UintN = AsmReadCr0 ();
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Cr4.UintN = AsmReadCr4 ();
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Flags.UintN = AsmReadEflags();
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//
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// CR0.MP bit (BIT1) must be set.
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// CR0.EM bit (BIT2) must be cleared.
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// CR4.OSFXSR bit (BIT9) must be set.
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// CR4.OSXMMEXCPT bit (BIT10) must be set.
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//
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DEBUG ((DEBUG_WARN, "VMOPT: CR0 %08X CR4 %08X EFLAGS %08X\n", Cr0, Cr4, Flags));
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if (Cr0.Bits.MP == 0) {
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DEBUG ((DEBUG_WARN, "VMOPT: WARN CR0 MP is NOT set\n"));
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}
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if (Cr0.Bits.EM != 0) {
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DEBUG ((DEBUG_WARN, "VMOPT: WARN CR0 EM is set\n"));
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}
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if (Cr4.Bits.OSFXSR == 0) {
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DEBUG ((DEBUG_WARN, "VMOPT: WARN CR4 OSFXSR is NOT set\n"));
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}
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if (Cr4.Bits.OSXMMEXCPT == 0) {
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DEBUG ((DEBUG_WARN, "VMOPT: WARN CR4 OSXMMEXCPT is NOT set\n"));
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}
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if (Flags.Bits.DF != 0) {
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DEBUG ((DEBUG_WARN, "VMOPT: WARN EFLAGS DF is set\n"));
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}
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DEBUG ((DEBUG_WARN, "VMOPT: CopyMem aligned src %p/aligned dst %p/size %u\n", Src, Dst, Size));
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gBS->Stall (SECONDS_TO_MICROSECONDS (1));
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CopyMem (Dst, Src, Size);
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Src += 6;
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DEBUG ((DEBUG_WARN, "VMOPT: CopyMem unaligned src %p/aligned dst %p/size %u\n", Src, Dst, Size));
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gBS->Stall (SECONDS_TO_MICROSECONDS (1));
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CopyMem (Dst, Src, Size);
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Size -= 12;
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DEBUG ((DEBUG_WARN, "VMOPT: CopyMem unaligned src %p/aligned dst %p/size %u\n", Src, Dst, Size));
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gBS->Stall (SECONDS_TO_MICROSECONDS (1));
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CopyMem (Dst, Src, Size);
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Dst += 6;
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DEBUG ((DEBUG_WARN, "VMOPT: CopyMem unaligned src %p/unaligned dst %p/size %u\n", Src, Dst, Size));
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gBS->Stall (SECONDS_TO_MICROSECONDS (1));
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CopyMem (Dst, Src, Size);
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DEBUG ((DEBUG_WARN, "VMOPT: Done testing\n"));
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gBS->Stall (SECONDS_TO_MICROSECONDS (1));
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return EFI_SUCCESS;
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}
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