Docs: Fix EC samples according to latest research published on applelife

https://applelife.ru/posts/807985
This commit is contained in:
vit9696 2019-05-30 23:58:45 +03:00
parent 3c8a1c669c
commit 8d2e15c9da
5 changed files with 115 additions and 114 deletions

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@ -1,27 +1,54 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20190215 (64-bit version)
* Copyright (c) 2000 - 2019 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
* AppleUsbPower compatibility table for Skylake+.
*
* Disassembly of iASLTtGlr6.aml, Thu May 9 02:09:20 2019
* Be warned that power supply values can be different
* for different systems. Depending on the configuration
* these values must match injected IOKitPersonalities
* for com.apple.driver.AppleUSBMergeNub. iPad remains
* being the most reliable device for testing USB port
* charging support.
*
* Original Table Header:
* Signature "SSDT"
* Length 0x000000F4 (244)
* Revision 0x02
* Checksum 0x2F
* OEM ID "APPLE "
* OEM Table ID "SsdtEC"
* OEM Revision 0x00001000 (4096)
* Compiler ID "INTL"
* Compiler Version 0x20190215 (538509845)
* Try NOT to rename EC0, H_EC, etc. to EC.
* These devices are incompatible with macOS and may break
* at any time. AppleACPIEC kext must NOT load.
* See the disable code below.
*
* Reference USB: https://applelife.ru/posts/550233
* Reference EC: https://applelife.ru/posts/807985
*/
DefinitionBlock ("", "SSDT", 2, "APPLE ", "SsdtEC", 0x00001000)
{
External (_SB_.PCI0.LPCB, DeviceObj)
/*
* Uncomment replacing EC0 with your own value in case your
* motherboard has an existing embedded controller of PNP0C09 type.
*
* While renaming EC0 to EC might potentially work initially,
* it connects an incompatible driver (AppleACPIEC) to your hardware.
* This can make your system unbootable at any time or hide bugs that
* could trigger randomly.
*/
/**
External (_SB_.PCI0.LPCB.EC0, DeviceObj)
Scope (\_SB.PCI0.LPCB.EC0)
{
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (0)
}
Else
{
Return (0x0F)
}
}
}
**/
Scope (\_SB)
{
Device (USBX)
@ -39,14 +66,14 @@ DefinitionBlock ("", "SSDT", 2, "APPLE ", "SsdtEC", 0x00001000)
Return (Package (0x08)
{
"kUSBSleepPowerSupply",
0x0640,
"kUSBSleepPortCurrentLimit",
0x0A8C,
"kUSBWakePowerSupply",
0x0640,
"kUSBWakePortCurrentLimit",
0x0A8C
"kUSBSleepPowerSupply",
0x13EC,
"kUSBSleepPortCurrentLimit",
0x0834,
"kUSBWakePowerSupply",
0x13EC,
"kUSBWakePortCurrentLimit",
0x0834
})
}
}
@ -54,21 +81,21 @@ DefinitionBlock ("", "SSDT", 2, "APPLE ", "SsdtEC", 0x00001000)
Scope (\_SB.PCI0.LPCB)
{
Device (EC)
{
Name (_HID, EisaId ("PNP0C09") /* Embedded Controller Device */) // _HID: Hardware ID
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
Name (_HID, "ACID0001") // _HID: Hardware ID
Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (0x0F)
}
Else
{
Return (Zero)
If (_OSI ("Darwin"))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
}
}
}
}

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@ -1,32 +1,58 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20190405 (64-bit version)
* Copyright (c) 2000 - 2019 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
* AppleUsbPower compatibility table for legacy hardware.
*
* Disassembly of iASLSmLgeI.aml, Thu May 30 16:21:47 2019
* Be warned that power supply values can be different
* for different systems. Depending on the configuration
* the values must be present in injected IOKitPersonalities
* for com.apple.driver.AppleUSBMergeNub. iPad remains being
* the most reliable device for testing USB port charging.
*
* Original Table Header:
* Signature "SSDT"
* Length 0x00000077 (119)
* Revision 0x02
* Checksum 0x2D
* OEM ID "APPLE "
* OEM Table ID "SsdtEC"
* OEM Revision 0x00001000 (4096)
* Compiler ID "INTL"
* Compiler Version 0x20190405 (538510341)
* Try NOT to rename EC0, H_EC, etc. to EC.
* These devices are incompatible with macOS and may break
* at any time. AppleACPIEC kext must NOT load.
* See the disable code below.
*
* Reference USB: https://applelife.ru/posts/550233
* Reference EC: https://applelife.ru/posts/807985
*/
DefinitionBlock ("", "SSDT", 2, "APPLE ", "SsdtEC", 0x00001000)
{
External (_SB_.PCI0.LPCB, DeviceObj)
/*
* Uncomment replacing EC0 with your own value in case your
* motherboard has an existing embedded controller of PNP0C09 type.
*
* While renaming EC0 to EC might potentially work initially,
* it connects an incompatible driver (AppleACPIEC) to your hardware.
* This can make your system unbootable at any time or hide bugs that
* could trigger randomly.
*/
/**
External (_SB_.PCI0.LPCB.EC0, DeviceObj)
Scope (\_SB.PCI0.LPCB.EC0)
{
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (0)
}
Else
{
Return (0x0F)
}
}
}
**/
Scope (\_SB.PCI0.LPCB)
{
Device (EC)
{
Name (_HID, EisaId ("PNP0C09") /* Embedded Controller Device */) // _HID: Hardware ID
Name (_HID, "ACID0001") // _HID: Hardware ID
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
@ -41,4 +67,3 @@ DefinitionBlock ("", "SSDT", 2, "APPLE ", "SsdtEC", 0x00001000)
}
}
}

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@ -1,22 +1,15 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20190215 (64-bit version)
* Copyright (c) 2000 - 2019 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
* USB compatibility table.
*
* Disassembly of iASL8AmXq4.aml, Tue Apr 16 22:05:03 2019
* Attention!
* Only for 7,8,9-series chipsets and 10.11 and newer!
*
* Original Table Header:
* Signature "SSDT"
* Length 0x0000005E (94)
* Revision 0x02
* Checksum 0x8F
* OEM ID "APPLE "
* OEM Table ID "EHCx_OFF"
* OEM Revision 0x00001000 (4096)
* Compiler ID "INTL"
* Compiler Version 0x20190215 (538509845)
* To disable EHC1 and EHC2 - set an option "XHCI Mode" to "Enabled" in yours BIOS.
* If the "XHCI Mode" option is not available in yours BIOS or works incorrectly, then use this ACPI table.
* Disabling through BIOS is preferable whenever possible.
*
* Note: for 7-series you need to use either "EH1D = One" or "EH2D = One" but not both!
* This is because only one of the devices (EHC1 or EHC2) is used by macOS. Check the IOReg.
*/
DefinitionBlock ("", "SSDT", 2, "APPLE ", "EHCx_OFF", 0x00001000)
{
@ -38,13 +31,3 @@ DefinitionBlock ("", "SSDT", 2, "APPLE ", "EHCx_OFF", 0x00001000)
}
}
}
// Attention!
// Only for 7,8,9-series chipsets and 10.11 and newer!
//
// To disable EHC1 and EHC2 - set an option "XHCI Mode" to "Enabled" in yours BIOS.
// If the "XHCI Mode" option is not available in yours BIOS or works incorrectly, then use this ACPI table.
// Disabling through BIOS is preferable whenever possible.
//
// Note: for 7-series you need to use either "EH1D = One" or "EH2D = One" but not both!
// This is because only one of the devices (EHC1 or EHC2) is used by macOS. Check the IOReg.

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@ -1,22 +1,5 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20190215 (64-bit version)
* Copyright (c) 2000 - 2019 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
* Disassembly of iASLspH90v.aml, Wed Apr 10 10:41:25 2019
*
* Original Table Header:
* Signature "SSDT"
* Length 0x000000A6 (166)
* Revision 0x02
* Checksum 0xF0
* OEM ID "CpuRef"
* OEM Table ID "CpuPlug"
* OEM Revision 0x00003000 (12288)
* Compiler ID "INTL"
* Compiler Version 0x20160729 (538314537)
* XCPM power management compatibility table.
*/
DefinitionBlock ("", "SSDT", 2, "CpuRef", "CpuPlug", 0x00003000)
{

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@ -1,22 +1,5 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20190215 (64-bit version)
* Copyright (c) 2000 - 2019 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
* Disassembly of iASLgWfJxu.aml, Wed Apr 10 10:23:44 2019
*
* Original Table Header:
* Signature "SSDT"
* Length 0x00000108 (264)
* Revision 0x02
* Checksum 0xFD
* OEM ID "hack"
* OEM Table ID "MCHCSBUS"
* OEM Revision 0x00000000 (0)
* Compiler ID "INTL"
* Compiler Version 0x20190215 (538509845)
* SMBus compatibility table.
*/
DefinitionBlock ("", "SSDT", 2, "hack", "MCHCSBUS", 0x00000000)
{