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AudioDxe: Restore CORB no poll on reset as default behaviour

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Fixes https://github.com/acidanthera/bugtracker/issues/1908
This commit is contained in:
MikeBeaton 2021-12-31 06:10:02 +00:00
parent 339cfceaea
commit 71bde87de9
3 changed files with 15 additions and 7 deletions
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2
Staging/AudioDxe/HdaController/HdaController.c
View File

@ -250,7 +250,7 @@ HdaControllerInitPciHw(
return Status;
}
} else if (GET_PCI_VENDOR_ID (HdaControllerDev->VendorId) == VEN_VMWARE_ID) {
HdaControllerDev->Quirks |= HDA_CONTROLLER_QUIRK_VMWARE;
HdaControllerDev->Quirks |= HDA_CONTROLLER_QUIRK_CORB_NO_POLL_RESET;
}
//

18
Staging/AudioDxe/HdaController/HdaController.h
View File

@ -279,26 +279,34 @@ typedef struct {
// at all. Unfortunately, this has to be set for all systems because CORB/RIRB must be
// set up to detect that we are on QEMU (at least if we rely only on reported controller
// and codec vendor ids, since QEMU controller incorrectly reports as Intel).
// TODO: If this causes problems, we may be able to use the previous quirk (which was
// commented out, but worked somewhat) of setting RINTCNT to 0xFF, in order to make
// QEMU run long enough to detect that it is QEMU and then only fully enable the rest
// of this quirk when needed.
// Problem:
// https://github.com/qemu/qemu/blob/a3607d/hw/audio/intel-hda.c#L331
// Only available work-around:
// https://github.com/qemu/qemu/blob/a3607d/hw/audio/intel-hda.c#L561
//
#define HDA_CONTROLLER_QUIRK_QEMU_1 BIT0
#define HDA_CONTROLLER_QUIRK_QEMU_1 BIT0
//
// Stream reset does not stay high when set.
// REF: https://gitlab.com/qemu-project/qemu/-/issues/757
//
#define HDA_CONTROLLER_QUIRK_QEMU_2 BIT1
#define HDA_CONTROLLER_QUIRK_QEMU_2 BIT1
//
// CORB reset does not stay high when set.
// CORB reset does not stay high when set; affects VMware Fusion, but also
// affects some real hardware:
// REF: https://github.com/acidanthera/bugtracker/issues/1908
// For some years AudioDxe had this as default behaviour, and despite not
// being to Intel HDA spec., it seems like retaining this may work best.
//
#define HDA_CONTROLLER_QUIRK_VMWARE BIT2
#define HDA_CONTROLLER_QUIRK_CORB_NO_POLL_RESET BIT2
#define HDA_CONTROLLER_QUIRK_INITIAL ( \
HDA_CONTROLLER_QUIRK_QEMU_1 \
HDA_CONTROLLER_QUIRK_QEMU_1 | HDA_CONTROLLER_QUIRK_CORB_NO_POLL_RESET \
)
struct _HDA_CONTROLLER_DEV {

2
Staging/AudioDxe/HdaController/HdaControllerMem.c
View File

@ -307,7 +307,7 @@ HdaControllerResetRingBuffer (
if (EFI_ERROR (Status)) {
return Status;
}
if (!(HdaRingBuffer->HdaDev->Quirks & HDA_CONTROLLER_QUIRK_VMWARE)) {
if (!(HdaRingBuffer->HdaDev->Quirks & HDA_CONTROLLER_QUIRK_CORB_NO_POLL_RESET)) {
Status = PciIo->PollMem (PciIo, EfiPciIoWidthUint16, PCI_HDA_BAR, HDA_REG_CORBRP, HDA_REG_CORBRP_RST, HDA_REG_CORBRP_RST, MS_TO_NANOSECONDS (50), &HdaRingPointerPollResult);
if (EFI_ERROR (Status)) {
return Status;