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932 lines
32 KiB
C
932 lines
32 KiB
C
/***************************************************************************//**
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* @file em_timer.h
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* @brief Timer/counter (TIMER) peripheral API
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* @version 4.2.1
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*******************************************************************************
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* @section License
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* <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b>
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*******************************************************************************
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*
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* Permission is granted to anyone to use this software for any purpose,
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* including commercial applications, and to alter it and redistribute it
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* freely, subject to the following restrictions:
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*
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* 1. The origin of this software must not be misrepresented; you must not
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* claim that you wrote the original software.
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* 2. Altered source versions must be plainly marked as such, and must not be
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* misrepresented as being the original software.
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* 3. This notice may not be removed or altered from any source distribution.
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*
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* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
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* obligation to support this Software. Silicon Labs is providing the
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* Software "AS IS", with no express or implied warranties of any kind,
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* including, but not limited to, any implied warranties of merchantability
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* or fitness for any particular purpose or warranties against infringement
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* of any proprietary rights of a third party.
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*
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* Silicon Labs will not be liable for any consequential, incidental, or
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* special damages, or any other relief, or for any claim by any third party,
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* arising from your use of this Software.
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*
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******************************************************************************/
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#ifndef __SILICON_LABS_EM_TIMER_H__
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#define __SILICON_LABS_EM_TIMER_H__
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#include "em_device.h"
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#if defined(TIMER_COUNT) && (TIMER_COUNT > 0)
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#include <stdbool.h>
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#include "em_assert.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************************************************************//**
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* @addtogroup EM_Library
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* @{
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******************************************************************************/
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/***************************************************************************//**
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* @addtogroup TIMER
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* @{
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******************************************************************************/
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/*******************************************************************************
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******************************* DEFINES ***********************************
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******************************************************************************/
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/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
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/** Validation of TIMER register block pointer reference for assert statements. */
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#if (TIMER_COUNT == 1)
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#define TIMER_REF_VALID(ref) ((ref) == TIMER0)
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#elif (TIMER_COUNT == 2)
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#define TIMER_REF_VALID(ref) (((ref) == TIMER0) || ((ref) == TIMER1))
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#elif (TIMER_COUNT == 3)
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#define TIMER_REF_VALID(ref) (((ref) == TIMER0) \
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|| ((ref) == TIMER1) \
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|| ((ref) == TIMER2))
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#elif (TIMER_COUNT == 4)
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#define TIMER_REF_VALID(ref) (((ref) == TIMER0) \
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|| ((ref) == TIMER1) \
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|| ((ref) == TIMER2) \
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|| ((ref) == TIMER3))
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#else
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#error "Undefined number of timers."
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#endif
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/** Validation of TIMER compare/capture channel number */
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#if defined(_SILICON_LABS_32B_PLATFORM_1)
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#define TIMER_CH_VALID(ch) ((ch) < 3)
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#elif defined(_SILICON_LABS_32B_PLATFORM_2)
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#define TIMER_CH_VALID(ch) ((ch) < 4)
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#else
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#error "Unknown platform. Undefined number of channels."
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#endif
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/** @endcond */
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/*******************************************************************************
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******************************** ENUMS ************************************
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******************************************************************************/
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/** Timer compare/capture mode. */
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typedef enum
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{
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timerCCModeOff = _TIMER_CC_CTRL_MODE_OFF, /**< Channel turned off. */
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timerCCModeCapture = _TIMER_CC_CTRL_MODE_INPUTCAPTURE, /**< Input capture. */
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timerCCModeCompare = _TIMER_CC_CTRL_MODE_OUTPUTCOMPARE, /**< Output compare. */
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timerCCModePWM = _TIMER_CC_CTRL_MODE_PWM /**< Pulse-Width modulation. */
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} TIMER_CCMode_TypeDef;
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/** Clock select. */
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typedef enum
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{
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/** Prescaled HFPER clock. */
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timerClkSelHFPerClk = _TIMER_CTRL_CLKSEL_PRESCHFPERCLK,
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/** Prescaled HFPER clock. */
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timerClkSelCC1 = _TIMER_CTRL_CLKSEL_CC1,
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/**
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* Cascaded, clocked by underflow (down-counting) or overflow (up-counting)
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* by lower numbered timer.
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*/
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timerClkSelCascade = _TIMER_CTRL_CLKSEL_TIMEROUF
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} TIMER_ClkSel_TypeDef;
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/** Input capture edge select. */
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typedef enum
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{
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/** Rising edges detected. */
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timerEdgeRising = _TIMER_CC_CTRL_ICEDGE_RISING,
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/** Falling edges detected. */
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timerEdgeFalling = _TIMER_CC_CTRL_ICEDGE_FALLING,
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/** Both edges detected. */
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timerEdgeBoth = _TIMER_CC_CTRL_ICEDGE_BOTH,
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/** No edge detection, leave signal as is. */
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timerEdgeNone = _TIMER_CC_CTRL_ICEDGE_NONE
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} TIMER_Edge_TypeDef;
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/** Input capture event control. */
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typedef enum
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{
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/** PRS output pulse, interrupt flag and DMA request set on every capture. */
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timerEventEveryEdge = _TIMER_CC_CTRL_ICEVCTRL_EVERYEDGE,
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/** PRS output pulse, interrupt flag and DMA request set on every second capture. */
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timerEventEvery2ndEdge = _TIMER_CC_CTRL_ICEVCTRL_EVERYSECONDEDGE,
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/**
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* PRS output pulse, interrupt flag and DMA request set on rising edge (if
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* input capture edge = BOTH).
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*/
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timerEventRising = _TIMER_CC_CTRL_ICEVCTRL_RISING,
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/**
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* PRS output pulse, interrupt flag and DMA request set on falling edge (if
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* input capture edge = BOTH).
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*/
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timerEventFalling = _TIMER_CC_CTRL_ICEVCTRL_FALLING
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} TIMER_Event_TypeDef;
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/** Input edge action. */
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typedef enum
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{
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/** No action taken. */
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timerInputActionNone = _TIMER_CTRL_FALLA_NONE,
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/** Start counter without reload. */
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timerInputActionStart = _TIMER_CTRL_FALLA_START,
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/** Stop counter without reload. */
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timerInputActionStop = _TIMER_CTRL_FALLA_STOP,
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/** Reload and start counter. */
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timerInputActionReloadStart = _TIMER_CTRL_FALLA_RELOADSTART
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} TIMER_InputAction_TypeDef;
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/** Timer mode. */
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typedef enum
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{
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timerModeUp = _TIMER_CTRL_MODE_UP, /**< Up-counting. */
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timerModeDown = _TIMER_CTRL_MODE_DOWN, /**< Down-counting. */
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timerModeUpDown = _TIMER_CTRL_MODE_UPDOWN, /**< Up/down-counting. */
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timerModeQDec = _TIMER_CTRL_MODE_QDEC /**< Quadrature decoder. */
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} TIMER_Mode_TypeDef;
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/** Compare/capture output action. */
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typedef enum
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{
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/** No action. */
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timerOutputActionNone = _TIMER_CC_CTRL_CUFOA_NONE,
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/** Toggle on event. */
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timerOutputActionToggle = _TIMER_CC_CTRL_CUFOA_TOGGLE,
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/** Clear on event. */
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timerOutputActionClear = _TIMER_CC_CTRL_CUFOA_CLEAR,
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/** Set on event. */
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timerOutputActionSet = _TIMER_CC_CTRL_CUFOA_SET
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} TIMER_OutputAction_TypeDef;
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/** Prescaler. */
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typedef enum
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{
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timerPrescale1 = _TIMER_CTRL_PRESC_DIV1, /**< Divide by 1. */
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timerPrescale2 = _TIMER_CTRL_PRESC_DIV2, /**< Divide by 2. */
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timerPrescale4 = _TIMER_CTRL_PRESC_DIV4, /**< Divide by 4. */
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timerPrescale8 = _TIMER_CTRL_PRESC_DIV8, /**< Divide by 8. */
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timerPrescale16 = _TIMER_CTRL_PRESC_DIV16, /**< Divide by 16. */
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timerPrescale32 = _TIMER_CTRL_PRESC_DIV32, /**< Divide by 32. */
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timerPrescale64 = _TIMER_CTRL_PRESC_DIV64, /**< Divide by 64. */
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timerPrescale128 = _TIMER_CTRL_PRESC_DIV128, /**< Divide by 128. */
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timerPrescale256 = _TIMER_CTRL_PRESC_DIV256, /**< Divide by 256. */
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timerPrescale512 = _TIMER_CTRL_PRESC_DIV512, /**< Divide by 512. */
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timerPrescale1024 = _TIMER_CTRL_PRESC_DIV1024 /**< Divide by 1024. */
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} TIMER_Prescale_TypeDef;
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/** Peripheral Reflex System signal. */
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typedef enum
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{
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timerPRSSELCh0 = _TIMER_CC_CTRL_PRSSEL_PRSCH0, /**< PRS channel 0. */
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timerPRSSELCh1 = _TIMER_CC_CTRL_PRSSEL_PRSCH1, /**< PRS channel 1. */
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timerPRSSELCh2 = _TIMER_CC_CTRL_PRSSEL_PRSCH2, /**< PRS channel 2. */
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timerPRSSELCh3 = _TIMER_CC_CTRL_PRSSEL_PRSCH3, /**< PRS channel 3. */
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#if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH4)
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timerPRSSELCh4 = _TIMER_CC_CTRL_PRSSEL_PRSCH4, /**< PRS channel 4. */
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#endif
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#if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH5)
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timerPRSSELCh5 = _TIMER_CC_CTRL_PRSSEL_PRSCH5, /**< PRS channel 5. */
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#endif
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#if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH6)
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timerPRSSELCh6 = _TIMER_CC_CTRL_PRSSEL_PRSCH6, /**< PRS channel 6. */
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#endif
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#if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH7)
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timerPRSSELCh7 = _TIMER_CC_CTRL_PRSSEL_PRSCH7, /**< PRS channel 7. */
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#endif
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#if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH8)
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timerPRSSELCh8 = _TIMER_CC_CTRL_PRSSEL_PRSCH8, /**< PRS channel 8. */
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#endif
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#if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH9)
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timerPRSSELCh9 = _TIMER_CC_CTRL_PRSSEL_PRSCH9, /**< PRS channel 9. */
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#endif
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#if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH10)
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timerPRSSELCh10 = _TIMER_CC_CTRL_PRSSEL_PRSCH10, /**< PRS channel 10. */
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#endif
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#if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH11)
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timerPRSSELCh11 = _TIMER_CC_CTRL_PRSSEL_PRSCH11, /**< PRS channel 11. */
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#endif
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} TIMER_PRSSEL_TypeDef;
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#if defined(_TIMER_DTFC_DTFA_NONE)
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/** DT (Dead Time) Fault Actions. */
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typedef enum
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{
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timerDtiFaultActionNone = _TIMER_DTFC_DTFA_NONE, /**< No action on fault. */
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timerDtiFaultActionInactive = _TIMER_DTFC_DTFA_INACTIVE, /**< Set outputs inactive. */
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timerDtiFaultActionClear = _TIMER_DTFC_DTFA_CLEAR, /**< Clear outputs. */
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timerDtiFaultActionTristate = _TIMER_DTFC_DTFA_TRISTATE /**< Tristate outputs. */
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} TIMER_DtiFaultAction_TypeDef;
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#endif
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/*******************************************************************************
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******************************* STRUCTS ***********************************
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******************************************************************************/
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/** TIMER initialization structure. */
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typedef struct
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{
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/** Start counting when init completed. */
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bool enable;
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/** Counter shall keep running during debug halt. */
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bool debugRun;
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/** Prescaling factor, if HFPER clock used. */
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TIMER_Prescale_TypeDef prescale;
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/** Clock selection. */
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TIMER_ClkSel_TypeDef clkSel;
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#if defined(TIMER_CTRL_X2CNT) && defined(TIMER_CTRL_ATI)
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/** 2x Count mode, counter increments/decrements by 2, meant for PWN mode. */
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bool count2x;
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/** ATI (Always Track Inputs) makes CCPOL always track
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* the polarity of the inputs. */
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bool ati;
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#endif
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/** Action on falling input edge. */
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TIMER_InputAction_TypeDef fallAction;
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/** Action on rising input edge. */
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TIMER_InputAction_TypeDef riseAction;
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/** Counting mode. */
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TIMER_Mode_TypeDef mode;
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/** DMA request clear on active. */
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bool dmaClrAct;
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/** Select X2 or X4 quadrature decode mode (if used). */
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bool quadModeX4;
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/** Determines if only counting up or down once. */
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bool oneShot;
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/** Timer start/stop/reload by other timers. */
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bool sync;
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} TIMER_Init_TypeDef;
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/** Default config for TIMER init structure. */
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#if defined(TIMER_CTRL_X2CNT) && defined(TIMER_CTRL_ATI)
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#define TIMER_INIT_DEFAULT \
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{ \
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true, /* Enable timer when init complete. */ \
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false, /* Stop counter during debug halt. */ \
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timerPrescale1, /* No prescaling. */ \
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timerClkSelHFPerClk, /* Select HFPER clock. */ \
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false, /* Not 2x count mode. */ \
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false, /* No ATI. */ \
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timerInputActionNone, /* No action on falling input edge. */ \
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timerInputActionNone, /* No action on rising input edge. */ \
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timerModeUp, /* Up-counting. */ \
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false, /* Do not clear DMA requests when DMA channel is active. */ \
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false, /* Select X2 quadrature decode mode (if used). */ \
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false, /* Disable one shot. */ \
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false /* Not started/stopped/reloaded by other timers. */ \
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}
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#else
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#define TIMER_INIT_DEFAULT \
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{ \
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true, /* Enable timer when init complete. */ \
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false, /* Stop counter during debug halt. */ \
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timerPrescale1, /* No prescaling. */ \
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timerClkSelHFPerClk, /* Select HFPER clock. */ \
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timerInputActionNone, /* No action on falling input edge. */ \
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timerInputActionNone, /* No action on rising input edge. */ \
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timerModeUp, /* Up-counting. */ \
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false, /* Do not clear DMA requests when DMA channel is active. */ \
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false, /* Select X2 quadrature decode mode (if used). */ \
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false, /* Disable one shot. */ \
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false /* Not started/stopped/reloaded by other timers. */ \
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}
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#endif
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/** TIMER compare/capture initialization structure. */
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typedef struct
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{
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/** Input capture event control. */
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TIMER_Event_TypeDef eventCtrl;
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/** Input capture edge select. */
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TIMER_Edge_TypeDef edge;
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/**
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* Peripheral reflex system trigger selection. Only applicable if @p prsInput
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* is enabled.
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*/
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TIMER_PRSSEL_TypeDef prsSel;
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/** Counter underflow output action. */
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TIMER_OutputAction_TypeDef cufoa;
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/** Counter overflow output action. */
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TIMER_OutputAction_TypeDef cofoa;
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/** Counter match output action. */
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TIMER_OutputAction_TypeDef cmoa;
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/** Compare/capture channel mode. */
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TIMER_CCMode_TypeDef mode;
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/** Enable digital filter. */
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bool filter;
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/** Select TIMERnCCx (false) or PRS input (true). */
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bool prsInput;
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/**
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* Compare output initial state. Only used in Output Compare and PWM mode.
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* When true, the compare/PWM output is set high when the counter is
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* disabled. When counting resumes, this value will represent the initial
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* value for the compare/PWM output. If the bit is cleared, the output
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* will be cleared when the counter is disabled.
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*/
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bool coist;
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/** Invert output from compare/capture channel. */
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bool outInvert;
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} TIMER_InitCC_TypeDef;
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/** Default config for TIMER compare/capture init structure. */
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#define TIMER_INITCC_DEFAULT \
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{ \
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timerEventEveryEdge, /* Event on every capture. */ \
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timerEdgeRising, /* Input capture edge on rising edge. */ \
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timerPRSSELCh0, /* Not used by default, select PRS channel 0. */ \
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timerOutputActionNone, /* No action on underflow. */ \
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timerOutputActionNone, /* No action on overflow. */ \
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timerOutputActionNone, /* No action on match. */ \
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timerCCModeOff, /* Disable compare/capture channel. */ \
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false, /* Disable filter. */ \
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false, /* Select TIMERnCCx input. */ \
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false, /* Clear output when counter disabled. */ \
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false /* Do not invert output. */ \
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}
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#if defined(_TIMER_DTCTRL_MASK)
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/** TIMER Dead Time Insertion (DTI) initialization structure. */
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typedef struct
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{
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/** Enable DTI or leave it disabled until @ref TIMER_EnableDTI() is called */
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bool enable;
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/** DTI Output Polarity */
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bool activeLowOut;
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/** DTI Complementary Output Invert */
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bool invertComplementaryOut;
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/** Enable Automatic Start-up functionality (when debugger exits) */
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bool autoRestart;
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/** Enable/disable PRS as DTI input. */
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bool enablePrsSource;
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/** Select which PRS channel as DTI input. Only valid if @p enablePrsSource
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is enabled. */
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TIMER_PRSSEL_TypeDef prsSel;
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/** DTI prescaling factor, if HFPER clock used. */
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TIMER_Prescale_TypeDef prescale;
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/** DTI Rise Time */
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unsigned int riseTime;
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/** DTI Fall Time */
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unsigned int fallTime;
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/** DTI outputs enable bit mask, consisting of one bit per DTI
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output signal, i.e. CC0, CC1, CC2, CDTI0, CDTI1 and CDTI2.
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This value should consist of one or more TIMER_DTOGEN_DTOGnnnEN flags
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(defined in \<part_name\>_timer.h) OR'ed together. */
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uint32_t outputsEnableMask;
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/** Enable core lockup as a fault source. */
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bool enableFaultSourceCoreLockup;
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/** Enable debugger as a fault source. */
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bool enableFaultSourceDebugger;
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/** Enable PRS fault source 0 (@p faultSourcePrsSel0) */
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bool enableFaultSourcePrsSel0;
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/** Select which PRS signal to be PRS fault source 0. */
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TIMER_PRSSEL_TypeDef faultSourcePrsSel0;
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/** Enable PRS fault source 1 (@p faultSourcePrsSel1) */
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bool enableFaultSourcePrsSel1;
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/** Select which PRS signal to be PRS fault source 1. */
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TIMER_PRSSEL_TypeDef faultSourcePrsSel1;
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/** Fault Action */
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TIMER_DtiFaultAction_TypeDef faultAction;
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} TIMER_InitDTI_TypeDef;
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/** Default config for TIMER DTI init structure. */
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#define TIMER_INITDTI_DEFAULT \
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{ \
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true, /* Enable the DTI. */ \
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false, /* CC[0|1|2] outputs are active high. */ \
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false, /* CDTI[0|1|2] outputs are not inverted. */ \
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false, /* No auto restart when debugger exits. */ \
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false, /* No PRS source selected. */ \
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timerPRSSELCh0, /* Not used by default, select PRS channel 0. */ \
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timerPrescale1, /* No prescaling. */ \
|
|
0, /* No rise time. */ \
|
|
0, /* No fall time. */ \
|
|
TIMER_DTOGEN_DTOGCC0EN|TIMER_DTOGEN_DTOGCDTI0EN, /* Enable CC0 and CDTI0 */\
|
|
true, /* Enable core lockup as fault source */ \
|
|
true, /* Enable debugger as fault source */ \
|
|
false, /* Disable PRS fault source 0 */ \
|
|
timerPRSSELCh0, /* Not used by default, select PRS channel 0. */ \
|
|
false, /* Disable PRS fault source 1 */ \
|
|
timerPRSSELCh0, /* Not used by default, select PRS channel 0. */ \
|
|
timerDtiFaultActionInactive, /* No fault action. */ \
|
|
}
|
|
#endif /* _TIMER_DTCTRL_MASK */
|
|
|
|
|
|
/*******************************************************************************
|
|
***************************** PROTOTYPES **********************************
|
|
******************************************************************************/
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Get capture value for compare/capture channel when operating in capture
|
|
* mode.
|
|
*
|
|
* @param[in] timer
|
|
* Pointer to TIMER peripheral register block.
|
|
*
|
|
* @param[in] ch
|
|
* Compare/capture channel to access.
|
|
*
|
|
* @return
|
|
* Current capture value.
|
|
******************************************************************************/
|
|
__STATIC_INLINE uint32_t TIMER_CaptureGet(TIMER_TypeDef *timer, unsigned int ch)
|
|
{
|
|
return timer->CC[ch].CCV;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Set compare value buffer for compare/capture channel when operating in
|
|
* compare or PWM mode.
|
|
*
|
|
* @details
|
|
* The compare value buffer holds the value which will be written to
|
|
* TIMERn_CCx_CCV on an update event if the buffer has been updated since
|
|
* the last event.
|
|
*
|
|
* @param[in] timer
|
|
* Pointer to TIMER peripheral register block.
|
|
*
|
|
* @param[in] ch
|
|
* Compare/capture channel to access.
|
|
*
|
|
* @param[in] val
|
|
* Value to set in compare value buffer register.
|
|
******************************************************************************/
|
|
__STATIC_INLINE void TIMER_CompareBufSet(TIMER_TypeDef *timer,
|
|
unsigned int ch,
|
|
uint32_t val)
|
|
{
|
|
timer->CC[ch].CCVB = val;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Set compare value for compare/capture channel when operating in compare
|
|
* or PWM mode.
|
|
*
|
|
* @param[in] timer
|
|
* Pointer to TIMER peripheral register block.
|
|
*
|
|
* @param[in] ch
|
|
* Compare/capture channel to access.
|
|
*
|
|
* @param[in] val
|
|
* Value to set in compare value register.
|
|
******************************************************************************/
|
|
__STATIC_INLINE void TIMER_CompareSet(TIMER_TypeDef *timer,
|
|
unsigned int ch,
|
|
uint32_t val)
|
|
{
|
|
timer->CC[ch].CCV = val;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Get TIMER counter value.
|
|
*
|
|
* @param[in] timer
|
|
* Pointer to TIMER peripheral register block.
|
|
*
|
|
* @return
|
|
* Current TIMER counter value.
|
|
******************************************************************************/
|
|
__STATIC_INLINE uint32_t TIMER_CounterGet(TIMER_TypeDef *timer)
|
|
{
|
|
return timer->CNT;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Set TIMER counter value.
|
|
*
|
|
* @param[in] timer
|
|
* Pointer to TIMER peripheral register block.
|
|
*
|
|
* @param[in] val
|
|
* Value to set counter to.
|
|
******************************************************************************/
|
|
__STATIC_INLINE void TIMER_CounterSet(TIMER_TypeDef *timer, uint32_t val)
|
|
{
|
|
timer->CNT = val;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Start/stop TIMER.
|
|
*
|
|
* @param[in] timer
|
|
* Pointer to TIMER peripheral register block.
|
|
*
|
|
* @param[in] enable
|
|
* true to enable counting, false to disable.
|
|
******************************************************************************/
|
|
__STATIC_INLINE void TIMER_Enable(TIMER_TypeDef *timer, bool enable)
|
|
{
|
|
EFM_ASSERT(TIMER_REF_VALID(timer));
|
|
|
|
if (enable)
|
|
{
|
|
timer->CMD = TIMER_CMD_START;
|
|
}
|
|
else
|
|
{
|
|
timer->CMD = TIMER_CMD_STOP;
|
|
}
|
|
}
|
|
|
|
|
|
void TIMER_Init(TIMER_TypeDef *timer, const TIMER_Init_TypeDef *init);
|
|
void TIMER_InitCC(TIMER_TypeDef *timer,
|
|
unsigned int ch,
|
|
const TIMER_InitCC_TypeDef *init);
|
|
|
|
#if defined(_TIMER_DTCTRL_MASK)
|
|
void TIMER_InitDTI(TIMER_TypeDef *timer, const TIMER_InitDTI_TypeDef *init);
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Enable or disable DTI unit.
|
|
*
|
|
* @param[in] timer
|
|
* Pointer to TIMER peripheral register block.
|
|
*
|
|
* @param[in] enable
|
|
* true to enable DTI unit, false to disable.
|
|
******************************************************************************/
|
|
__STATIC_INLINE void TIMER_EnableDTI(TIMER_TypeDef *timer, bool enable)
|
|
{
|
|
EFM_ASSERT(TIMER0 == timer);
|
|
|
|
if (enable)
|
|
{
|
|
timer->DTCTRL |= TIMER_DTCTRL_DTEN;
|
|
}
|
|
else
|
|
{
|
|
timer->DTCTRL &= ~TIMER_DTCTRL_DTEN;
|
|
}
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Get DTI fault source flags status.
|
|
*
|
|
* @note
|
|
* The event bits are not cleared by the use of this function.
|
|
*
|
|
* @param[in] timer
|
|
* Pointer to TIMER peripheral register block.
|
|
*
|
|
* @return
|
|
* Status of the DTI fault source flags. Returns one or more valid
|
|
* DTI fault source flags (TIMER_DTFAULT_nnn) OR'ed together.
|
|
******************************************************************************/
|
|
__STATIC_INLINE uint32_t TIMER_GetDTIFault(TIMER_TypeDef *timer)
|
|
{
|
|
EFM_ASSERT(TIMER0 == timer);
|
|
return timer->DTFAULT;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Clear DTI fault source flags.
|
|
*
|
|
* @param[in] timer
|
|
* Pointer to TIMER peripheral register block.
|
|
*
|
|
* @param[in] flags
|
|
* DTI fault source(s) to clear. Use one or more valid DTI fault
|
|
* source flags (TIMER_DTFAULT_nnn) OR'ed together.
|
|
******************************************************************************/
|
|
__STATIC_INLINE void TIMER_ClearDTIFault(TIMER_TypeDef *timer, uint32_t flags)
|
|
|
|
{
|
|
EFM_ASSERT(TIMER0 == timer);
|
|
timer->DTFAULTC = flags;
|
|
}
|
|
#endif /* _TIMER_DTCTRL_MASK */
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Clear one or more pending TIMER interrupts.
|
|
*
|
|
* @param[in] timer
|
|
* Pointer to TIMER peripheral register block.
|
|
*
|
|
* @param[in] flags
|
|
* Pending TIMER interrupt source(s) to clear. Use one or more valid
|
|
* interrupt flags for the TIMER module (TIMER_IF_nnn) OR'ed together.
|
|
******************************************************************************/
|
|
__STATIC_INLINE void TIMER_IntClear(TIMER_TypeDef *timer, uint32_t flags)
|
|
{
|
|
timer->IFC = flags;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Disable one or more TIMER interrupts.
|
|
*
|
|
* @param[in] timer
|
|
* Pointer to TIMER peripheral register block.
|
|
*
|
|
* @param[in] flags
|
|
* TIMER interrupt source(s) to disable. Use one or more valid
|
|
* interrupt flags for the TIMER module (TIMER_IF_nnn) OR'ed together.
|
|
******************************************************************************/
|
|
__STATIC_INLINE void TIMER_IntDisable(TIMER_TypeDef *timer, uint32_t flags)
|
|
{
|
|
timer->IEN &= ~flags;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Enable one or more TIMER interrupts.
|
|
*
|
|
* @note
|
|
* Depending on the use, a pending interrupt may already be set prior to
|
|
* enabling the interrupt. Consider using TIMER_IntClear() prior to enabling
|
|
* if such a pending interrupt should be ignored.
|
|
*
|
|
* @param[in] timer
|
|
* Pointer to TIMER peripheral register block.
|
|
*
|
|
* @param[in] flags
|
|
* TIMER interrupt source(s) to enable. Use one or more valid
|
|
* interrupt flags for the TIMER module (TIMER_IF_nnn) OR'ed together.
|
|
******************************************************************************/
|
|
__STATIC_INLINE void TIMER_IntEnable(TIMER_TypeDef *timer, uint32_t flags)
|
|
{
|
|
timer->IEN |= flags;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Get pending TIMER interrupt flags.
|
|
*
|
|
* @note
|
|
* The event bits are not cleared by the use of this function.
|
|
*
|
|
* @param[in] timer
|
|
* Pointer to TIMER peripheral register block.
|
|
*
|
|
* @return
|
|
* TIMER interrupt source(s) pending. Returns one or more valid
|
|
* interrupt flags for the TIMER module (TIMER_IF_nnn) OR'ed together.
|
|
******************************************************************************/
|
|
__STATIC_INLINE uint32_t TIMER_IntGet(TIMER_TypeDef *timer)
|
|
{
|
|
return timer->IF;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Get enabled and pending TIMER interrupt flags.
|
|
* Useful for handling more interrupt sources in the same interrupt handler.
|
|
*
|
|
* @param[in] timer
|
|
* Pointer to TIMER peripheral register block.
|
|
*
|
|
* @note
|
|
* Interrupt flags are not cleared by the use of this function.
|
|
*
|
|
* @return
|
|
* Pending and enabled TIMER interrupt sources.
|
|
* The return value is the bitwise AND combination of
|
|
* - the OR combination of enabled interrupt sources in TIMERx_IEN_nnn
|
|
* register (TIMERx_IEN_nnn) and
|
|
* - the OR combination of valid interrupt flags of the TIMER module
|
|
* (TIMERx_IF_nnn).
|
|
******************************************************************************/
|
|
__STATIC_INLINE uint32_t TIMER_IntGetEnabled(TIMER_TypeDef *timer)
|
|
{
|
|
uint32_t ien;
|
|
|
|
/* Store TIMER->IEN in temporary variable in order to define explicit order
|
|
* of volatile accesses. */
|
|
ien = timer->IEN;
|
|
|
|
/* Bitwise AND of pending and enabled interrupts */
|
|
return timer->IF & ien;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Set one or more pending TIMER interrupts from SW.
|
|
*
|
|
* @param[in] timer
|
|
* Pointer to TIMER peripheral register block.
|
|
*
|
|
* @param[in] flags
|
|
* TIMER interrupt source(s) to set to pending. Use one or more valid
|
|
* interrupt flags for the TIMER module (TIMER_IF_nnn) OR'ed together.
|
|
******************************************************************************/
|
|
__STATIC_INLINE void TIMER_IntSet(TIMER_TypeDef *timer, uint32_t flags)
|
|
{
|
|
timer->IFS = flags;
|
|
}
|
|
|
|
#if defined(_TIMER_DTLOCK_LOCKKEY_LOCK)
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Lock some of the TIMER registers in order to protect them from being
|
|
* modified.
|
|
*
|
|
* @details
|
|
* Please refer to the reference manual for TIMER registers that will be
|
|
* locked.
|
|
*
|
|
* @note
|
|
* If locking the TIMER registers, they must be unlocked prior to using any
|
|
* TIMER API functions modifying TIMER registers protected by the lock.
|
|
*
|
|
* @param[in] timer
|
|
* Pointer to TIMER peripheral register block.
|
|
******************************************************************************/
|
|
__STATIC_INLINE void TIMER_Lock(TIMER_TypeDef *timer)
|
|
{
|
|
EFM_ASSERT(TIMER0 == timer);
|
|
|
|
timer->DTLOCK = TIMER_DTLOCK_LOCKKEY_LOCK;
|
|
}
|
|
#endif
|
|
|
|
void TIMER_Reset(TIMER_TypeDef *timer);
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Set top value buffer for timer.
|
|
*
|
|
* @details
|
|
* When the top value buffer register is updated, the value is loaded into
|
|
* the top value register at the next wrap around. This feature is useful
|
|
* in order to update the top value safely when the timer is running.
|
|
*
|
|
* @param[in] timer
|
|
* Pointer to TIMER peripheral register block.
|
|
*
|
|
* @param[in] val
|
|
* Value to set in top value buffer register.
|
|
******************************************************************************/
|
|
__STATIC_INLINE void TIMER_TopBufSet(TIMER_TypeDef *timer, uint32_t val)
|
|
{
|
|
timer->TOPB = val;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Get top value setting for timer.
|
|
*
|
|
* @param[in] timer
|
|
* Pointer to TIMER peripheral register block.
|
|
*
|
|
* @return
|
|
* Current top value.
|
|
******************************************************************************/
|
|
__STATIC_INLINE uint32_t TIMER_TopGet(TIMER_TypeDef *timer)
|
|
{
|
|
return timer->TOP;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Set top value for timer.
|
|
*
|
|
* @param[in] timer
|
|
* Pointer to TIMER peripheral register block.
|
|
*
|
|
* @param[in] val
|
|
* Value to set in top value register.
|
|
******************************************************************************/
|
|
__STATIC_INLINE void TIMER_TopSet(TIMER_TypeDef *timer, uint32_t val)
|
|
{
|
|
timer->TOP = val;
|
|
}
|
|
|
|
|
|
#if defined(TIMER_DTLOCK_LOCKKEY_UNLOCK)
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Unlock the TIMER so that writing to locked registers again is possible.
|
|
*
|
|
* @param[in] timer
|
|
* Pointer to TIMER peripheral register block.
|
|
******************************************************************************/
|
|
__STATIC_INLINE void TIMER_Unlock(TIMER_TypeDef *timer)
|
|
{
|
|
EFM_ASSERT(TIMER0 == timer);
|
|
|
|
timer->DTLOCK = TIMER_DTLOCK_LOCKKEY_UNLOCK;
|
|
}
|
|
#endif
|
|
|
|
|
|
/** @} (end addtogroup TIMER) */
|
|
/** @} (end addtogroup EM_Library) */
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* defined(TIMER_COUNT) && (TIMER_COUNT > 0) */
|
|
#endif /* __SILICON_LABS_EM_TIMER_H__ */
|