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Adapt source files
Adapt some source files to compile for ESP32 S3
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@ -22,7 +22,7 @@
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#define UNUSED(x) (void)(x)
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#if ESP_IDF_VERSION_MAJOR>=5 || CONFIG_IDF_TARGET_ESP32C3
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#if ESP_IDF_VERSION_MAJOR>=5 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
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#define SPICHANNEL0_HOST SPI2_HOST
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#define SPICHANNEL1_HOST SPI3_HOST
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#else
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@ -30,7 +30,6 @@
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#define SPICHANNEL1_HOST VSPI_HOST
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#endif
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int getSPIChannelPnt(IOEventFlags device){
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return device - EV_SPI1;
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}
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@ -160,18 +160,25 @@ void taskWaitNotify(){
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#define TIMER_INTR_SEL TIMER_INTR_LEVEL /*!< Timer level interrupt */
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#define TIMER_GROUP TIMER_GROUP_0 /*!< Test on timer group 0 */
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#define TIMER_DIVIDER 80 /*!< Hardware timer clock divider */
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#if (ESP_IDF_VERSION_MAJOR>=5) || CONFIG_IDF_TARGET_ESP32C3
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#define TIMER_FINE_ADJ (1.4*(esp_clk_apb_freq() / TIMER_DIVIDER)/1000000) /*!< used to compensate alarm value */
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#define TIMER_TX_UPDATE(TIMER_N) TIMERG0.hw_timer[TIMER_N].update.tx_update = 1
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#define TIMER_ALARM_EN(TIMER_N) TIMERG0.hw_timer[TIMER_N].config.tx_alarm_en = 1;
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#define TIMER_0_INT_CLR() TIMERG0.int_clr_timers.t0_int_clr = 1
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#define TIMER_1_INT_CLR() TIMERG0.int_clr_timers.t1_int_clr = 1
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#define TIMER_FINE_ADJ (1.4*(esp_clk_apb_freq() / TIMER_DIVIDER)/1000000) /*!< used to compensate alarm value */
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#define TIMER_TX_UPDATE(TIMER_N) TIMERG0.hw_timer[TIMER_N].update.tx_update = 1
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#define TIMER_ALARM_EN(TIMER_N) TIMERG0.hw_timer[TIMER_N].config.tx_alarm_en = 1;
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#define TIMER_0_INT_CLR() TIMERG0.int_clr_timers.t0_int_clr = 1
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#define TIMER_1_INT_CLR() TIMERG0.int_clr_timers.t1_int_clr = 1
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#elif CONFIG_IDF_TARGET_ESP32S3
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#define TIMER_FINE_ADJ (1.4*(esp_clk_apb_freq() / TIMER_DIVIDER)/1000000) /*!< used to compensate alarm value */
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#define TIMER_TX_UPDATE(TIMER_N) TIMERG0.hw_timer[TIMER_N].update.tn_update = 1
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#define TIMER_ALARM_EN(TIMER_N) TIMERG0.hw_timer[TIMER_N].config.tn_alarm_en = 1;
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#define TIMER_0_INT_CLR() TIMERG0.int_clr_timers.t0_int_clr = 1
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#define TIMER_1_INT_CLR() TIMERG0.int_clr_timers.t1_int_clr = 1
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#else
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#define TIMER_FINE_ADJ (1.4*(TIMER_BASE_CLK / TIMER_DIVIDER)/1000000) /*!< used to compensate alarm value */
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#define TIMER_TX_UPDATE(TIMER_N) TIMERG0.hw_timer[TIMER_N].update = 1
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#define TIMER_ALARM_EN(TIMER_N) TIMERG0.hw_timer[TIMER_N].config.alarm_en = 1
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#define TIMER_0_INT_CLR() TIMERG0.int_clr_timers.t0 = 1;
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#define TIMER_1_INT_CLR() TIMERG0.int_clr_timers.t1 = 1;
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#define TIMER_FINE_ADJ (1.4*(TIMER_BASE_CLK / TIMER_DIVIDER)/1000000) /*!< used to compensate alarm value */
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#define TIMER_TX_UPDATE(TIMER_N) TIMERG0.hw_timer[TIMER_N].update = 1
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#define TIMER_ALARM_EN(TIMER_N) TIMERG0.hw_timer[TIMER_N].config.alarm_en = 1
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#define TIMER_0_INT_CLR() TIMERG0.int_clr_timers.t0 = 1;
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#define TIMER_1_INT_CLR() TIMERG0.int_clr_timers.t1 = 1;
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#endif
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BaseType_t xHigherPriorityTaskWoken = pdFALSE;
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