From d91ee0519e347669a681e62fe858c39d8a146cbe Mon Sep 17 00:00:00 2001
From: Gordon Williams <gw@pur3.co.uk>
Date: Mon, 4 Nov 2013 18:04:13 +0000
Subject: [PATCH] Get A13/A14 working on Espruino board (these were JTAG)

---
 targets/stm32/jshardware.c | 5 +++++
 targets/stm32_boot/utils.c | 4 ++++
 2 files changed, 9 insertions(+)

diff --git a/targets/stm32/jshardware.c b/targets/stm32/jshardware.c
index c1ee6c635..8a965b5e3 100644
--- a/targets/stm32/jshardware.c
+++ b/targets/stm32/jshardware.c
@@ -669,6 +669,11 @@ void jshInit() {
   GPIO_PinRemapConfig(GPIO_Remap_SWJ_NoJTRST, ENABLE);    
   GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE);
 #endif
+#ifdef ESPRUINOBOARD
+  // reclaim A13 and A14 (do we need the two above now?)
+  GPIO_PinRemapConfig(GPIO_Remap_SWJ_Disable, ENABLE); // Disable JTAG/SWD so pins are available
+#endif
+
 
   NVIC_InitTypeDef NVIC_InitStructure;
   /* Note, DO NOT set SysTicck priority using NVIC_Init. It is done above by NVIC_SetPriority */
diff --git a/targets/stm32_boot/utils.c b/targets/stm32_boot/utils.c
index a211fd013..c08bb0fe0 100644
--- a/targets/stm32_boot/utils.c
+++ b/targets/stm32_boot/utils.c
@@ -174,6 +174,10 @@ void initHardware() {
        RCC_APB2Periph_GPIOG |
        RCC_APB2Periph_AFIO, ENABLE);
 #endif
+#ifdef ESPRUINOBOARD
+  // reclaim A13 and A14 (do we need the two above now?)
+  GPIO_PinRemapConfig(GPIO_Remap_SWJ_Disable, ENABLE); // Disable JTAG/SWD so pins are available
+#endif
 
   RCC_PCLK1Config(RCC_HCLK_Div8); // PCLK1 must be >8 Mhz for USB to work
   RCC_PCLK2Config(RCC_HCLK_Div16);