mirror of
https://github.com/espruino/Espruino.git
synced 2025-12-08 19:06:15 +00:00
Merge pull request #692 from nkolban/master
#606. Initial framework for hardware SPI for ESP8266.
This commit is contained in:
commit
471b8e15ff
16
Makefile
16
Makefile
@ -506,6 +506,7 @@ else ifdef ESP8266_512KB
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# into ram (dram+iram) and the last 16KB are reserved for the SDK. That leaves 432KB (0x6C000).
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EMBEDDED=1
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USE_NET=1
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#USE_FILESYSTEM=1
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BOARD=ESP8266_BOARD
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# We have to disable inlining to keep code size in check
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OPTIMIZEFLAGS+=-Os -fno-inline-functions -std=gnu11 -fgnu89-inline -Wl,--allow-multiple-definition
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@ -973,7 +974,8 @@ libs/network/js/network_js.c
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ifdef USE_ESP8266
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DEFINES += -DUSE_ESP8266
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WRAPPERSOURCES += libs/network/esp8266/jswrap_esp8266.c
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WRAPPERSOURCES += libs/network/esp8266/jswrap_esp8266_network.c \
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targets/esp8266/jswrap_esp8266.c
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INCLUDE += -I$(ROOT)/libs/network/esp8266
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SOURCES += \
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libs/network/esp8266/network_esp8266.c\
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@ -1497,11 +1499,12 @@ LDFLAGS += -L$(ESP8266_SDK_ROOT)/lib \
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# Extra source files specific to the ESP8266
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SOURCES += targets/esp8266/uart.c \
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targets/esp8266/user_main.c \
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targets/esp8266/jshardware.c \
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targets/esp8266/i2c_master.c \
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targets/esp8266/esp8266_board_utils.c \
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libs/network/esp8266/network_esp8266.c
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targets/esp8266/spi.c \
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targets/esp8266/user_main.c \
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targets/esp8266/jshardware.c \
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targets/esp8266/i2c_master.c \
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targets/esp8266/esp8266_board_utils.c \
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libs/network/esp8266/network_esp8266.c
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# if using the hw_timer: targets/esp8266/hw_timer.c \
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# The tool used for building the firmware and flashing
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@ -1606,6 +1609,7 @@ proj: $(PROJ_NAME).elf $(PROJ_NAME)_0x00000.bin $(PROJ_NAME)_0x10000.bin $(PROJ_
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$(PROJ_NAME).elf: $(OBJS) $(LINKER_FILE)
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$(Q)$(LD) $(OPTIMIZEFLAGS) -nostdlib -Wl,--no-check-sections -Wl,-static -r -o partial.o $(OBJS)
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$(Q)$(OBJCOPY) --rename-section .text=.irom0.text --rename-section .literal=.irom0.literal partial.o
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$(Q)$(OBJCOPY) --rename-section .force.text=.text partial.o
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$(Q)$(LD) $(LDFLAGS) -Ttargets/esp8266/eagle.app.v6.0x10000.ld -o $@ partial.o -Wl,--start-group $(LIBS) -Wl,--end-group
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$(Q)rm partial.o
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$(Q)$(OBJDUMP) --headers -j .irom0.text -j .text $(PROJ_NAME).elf | tail -n +4
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1
boards/.gitignore
vendored
Normal file
1
boards/.gitignore
vendored
Normal file
@ -0,0 +1 @@
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/__pycache__/
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@ -35,7 +35,7 @@ chip = {
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'flash' : 1024,
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'speed' : 80,
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'usart' : 1,
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'spi' : 0,
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'spi' : 1,
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'i2c' : 1,
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'adc' : 1,
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'dac' : 0,
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@ -29,7 +29,7 @@ chip = {
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'flash' : 512,
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'speed' : 80,
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'usart' : 1,
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'spi' : 0,
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'spi' : 1,
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'i2c' : 1,
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'adc' : 1,
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'dac' : 0,
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@ -34,7 +34,7 @@ of beta. */
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#define _GCC_WRAP_STDINT_H
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typedef long long int64_t;
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#include "jswrap_esp8266.h"
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#include "jswrap_esp8266_network.h"
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#include "jsinteractive.h" // Pull inn the jsiConsolePrint function
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#include "network.h"
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#include "network_esp8266.h"
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@ -14,8 +14,8 @@
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* ----------------------------------------------------------------------------
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*/
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#ifndef LIBS_NETWORK_ESP8266_JSWRAP_ESP8266_H_
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#define LIBS_NETWORK_ESP8266_JSWRAP_ESP8266_H_
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#ifndef LIBS_NETWORK_ESP8266_JSWRAP_ESP8266_NETWORK_H_
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#define LIBS_NETWORK_ESP8266_JSWRAP_ESP8266_NETWORK_H_
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#include "jsvar.h"
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// Deprecated
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@ -67,4 +67,4 @@ void jswrap_ESP8266_updateCPUFreq(JsVar *jsFreq);
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void jswrap_ESP8266_init();
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#endif /* LIBS_NETWORK_ESP8266_JSWRAP_ESP8266_H_ */
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#endif /* LIBS_NETWORK_ESP8266_JSWRAP_ESP8266_NETWORK_H_ */
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@ -71,7 +71,7 @@ volatile unsigned char ioHead=0, ioTail=0;
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* Initialize all the devices.
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*/
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void jshInitDevices() { // called from jshInit
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int i;
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unsigned int i;
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// setup flow control
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for (i=0;i<sizeof(jshSerialDeviceStates) / sizeof(JshSerialDeviceState);i++)
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jshSerialDeviceStates[i] = SDS_NONE;
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@ -24,6 +24,7 @@
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#include <espmissingincludes.h>
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#include <uart.h>
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#include <i2c_master.h>
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#include <spi.h> // Include the MetalPhreak/ESP8266_SPI_Library headers.
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//#define FAKE_STDLIB
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#define _GCC_WRAP_STDINT_H
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@ -53,6 +54,10 @@ typedef long long int64_t;
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// Address in RTC RAM where we save the time
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#define RTC_TIME_ADDR (256/4) // start of "user data" in RTC RAM
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static bool g_spiInitialized = false;
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static int g_lastSPIRead = -1;
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/**
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* Transmit all the characters in the transmit buffer.
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*
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@ -159,6 +164,8 @@ void jshReset() {
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jshPinSetState(i, JSHPINSTATE_GPIO_IN);
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}
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*/
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g_spiInitialized = false; // Flag the hardware SPI interface as un-initialized.
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g_lastSPIRead = -1;
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os_printf("< jshReset\n");
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} // End of jshReset
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@ -588,26 +595,69 @@ void jshUSARTKick(
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//===== SPI =====
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/**
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* Unknown
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* Initialize the hardware SPI device.
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* On the ESP8266, hardware SPI is implemented via a set of pins defined
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* as follows:
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*
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* | GPIO | NodeMCU | Name | Function |
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* |--------|---------|-------|----------|
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* | GPIO12 | D6 | HMISO | MISO |
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* | GPIO13 | D7 | HMOSI | MOSI |
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* | GPIO14 | D5 | HSCLK | CLK |
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* | GPIO15 | D8 | HCS | CS |
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*
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*/
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void jshSPISetup(
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IOEventFlags device, //!< Unknown
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JshSPIInfo *inf //!< Unknown
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IOEventFlags device, //!< The identity of the SPI device being initialized.
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JshSPIInfo *inf //!< Flags for the SPI device.
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) {
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os_printf("ESP8266: jshSPISetup: device=%d, inf=0x%x\n", device, (int)inf);
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// The device should be one of EV_SPI1, EV_SPI2 or EV_SPI3.
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os_printf("> jshSPISetup - jshSPISetup: device=%d\n", device);
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switch(device) {
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case EV_SPI1:
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os_printf(" - Device is SPI1\n");
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// EV_SPI1 is the ESP8266 hardware SPI ...
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spi_init(HSPI); // Initialize the hardware SPI components.
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spi_clock(HSPI, CPU_CLK_FREQ / (inf->baudRate * 2), 2);
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g_spiInitialized = true;
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g_lastSPIRead = -1;
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break;
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case EV_SPI2:
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os_printf(" - Device is SPI2\n");
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break;
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case EV_SPI3:
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os_printf(" - Device is SPI3\n");
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break;
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default:
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os_printf(" - Device is Unknown!!\n");
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break;
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}
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if (inf != NULL) {
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os_printf("baudRate=%d, baudRateSpec=%d, pinSCK=%d, pinMISO=%d, pinMOSI=%d, spiMode=%d, spiMSB=%d\n",
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inf->baudRate, inf->baudRateSpec, inf->pinSCK, inf->pinMISO, inf->pinMOSI, inf->spiMode, inf->spiMSB);
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}
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os_printf("< jshSPISetup\n");
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}
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/** Send data through the given SPI device (if data>=0), and return the result
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* of the previous send (or -1). If data<0, no data is sent and the function
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* waits for data to be returned */
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int jshSPISend(
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IOEventFlags device, //!< Unknown
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int data //!< Unknown
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IOEventFlags device, //!< The identity of the SPI device through which data is being sent.
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int data //!< The data to be sent or an indication that no data is to be sent.
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) {
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os_printf("ESP8266: jshSPISend\n");
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return NAN;
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if (device != EV_SPI1) {
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return -1;
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}
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//os_printf("> jshSPISend - device=%d, data=%x\n", device, data);
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int retData = g_lastSPIRead;
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if (data >=0) {
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g_lastSPIRead = spi_tx8(HSPI, data);
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} else {
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g_lastSPIRead = -1;
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}
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//os_printf("< jshSPISend\n");
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return retData;
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}
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@ -618,9 +668,15 @@ void jshSPISend16(
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IOEventFlags device, //!< Unknown
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int data //!< Unknown
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) {
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os_printf("ESP8266: jshSPISend16\n");
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jshSPISend(device, data >> 8);
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jshSPISend(device, data & 255);
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//os_printf("> jshSPISend16 - device=%d, data=%x\n", device, data);
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//jshSPISend(device, data >> 8);
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//jshSPISend(device, data & 255);
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if (device != EV_SPI1) {
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return;
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}
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spi_tx16(HSPI, data);
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//os_printf("< jshSPISend16\n");
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}
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@ -631,7 +687,8 @@ void jshSPISet16(
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IOEventFlags device, //!< Unknown
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bool is16 //!< Unknown
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) {
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os_printf("ESP8266: jshSPISet16\n");
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os_printf("> jshSPISet16 - device=%d, is16=%d\n", device, is16);
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os_printf("< jshSPISet16\n");
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}
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@ -641,11 +698,15 @@ void jshSPISet16(
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void jshSPIWait(
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IOEventFlags device //!< Unknown
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) {
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os_printf("ESP8266: jshSPIWait\n");
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os_printf("> jshSPIWait - device=%d\n", device);
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while(spi_busy(HSPI)) ;
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os_printf("< jshSPIWait\n");
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}
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/** Set whether to use the receive interrupt or not */
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void jshSPISetReceive(IOEventFlags device, bool isReceive) {
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os_printf("> jshSPISetReceive - device=%d, isReceive=%d\n", device, isReceive);
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os_printf("< jshSPISetReceive\n");
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}
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//===== I2C =====
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@ -948,8 +1009,17 @@ void jshUtilTimerReschedule(JsSysTime period) {
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//===== Miscellaneous =====
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bool jshIsDeviceInitialised(IOEventFlags device) {
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os_printf("ESP8266: jshIsDeviceInitialised %d\n", device);
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return true;
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os_printf("> jshIsDeviceInitialised - %d\n", device);
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bool retVal = true;
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switch(device) {
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case EV_SPI1:
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retVal = g_spiInitialized;
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break;
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default:
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break;
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}
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os_printf("< jshIsDeviceInitialised - %d\n", retVal);
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return retVal;
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} // End of jshIsDeviceInitialised
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// the esp8266 doesn't have any temperature sensor
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160
targets/esp8266/jswrap_esp8266.c
Normal file
160
targets/esp8266/jswrap_esp8266.c
Normal file
@ -0,0 +1,160 @@
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/*
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* This file is part of Espruino, a JavaScript interpreter for Microcontrollers
|
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*
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* Copyright (C) 2015 Gordon Williams <gw@pur3.co.uk>
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*
|
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* This Source Code Form is subject to the terms of the Mozilla Public
|
||||
* License, v. 2.0. If a copy of the MPL was not distributed with this
|
||||
* file, You can obtain one at http://mozilla.org/MPL/2.0/.
|
||||
*
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||||
* ----------------------------------------------------------------------------
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* This file is designed to be parsed during the build process
|
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*
|
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* Contains ESP8266 board specific functions.
|
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* ----------------------------------------------------------------------------
|
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*/
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/* DO_NOT_INCLUDE_IN_DOCS - this is a special token for common.py,
|
||||
so we don't put this into espruino.com/Reference until this is out
|
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of beta. */
|
||||
|
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// Because the ESP8266 JS wrapper is assured to be running on an ESP8266 we
|
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// can assume that inclusion of ESP8266 headers will be acceptable.
|
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#include <c_types.h>
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#include <user_interface.h>
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#include <mem.h>
|
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#include <osapi.h>
|
||||
#include <ping.h>
|
||||
#include <espconn.h>
|
||||
#include <espmissingincludes.h>
|
||||
#include <uart.h>
|
||||
|
||||
#define _GCC_WRAP_STDINT_H
|
||||
typedef long long int64_t;
|
||||
|
||||
#include <jswrap_esp8266.h>
|
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#include "jsinteractive.h" // Pull inn the jsiConsolePrint function
|
||||
|
||||
#define _BV(bit) (1 << (bit))
|
||||
|
||||
static uint32_t _getCycleCount(void) __attribute__((always_inline));
|
||||
|
||||
static inline uint32_t _getCycleCount(void) {
|
||||
uint32_t ccount;
|
||||
__asm__ __volatile__("rsr %0,ccount":"=a" (ccount));
|
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return ccount;
|
||||
}
|
||||
|
||||
/*JSON{
|
||||
"type" : "staticmethod",
|
||||
"class" : "ESP8266",
|
||||
"name" : "neopixelWrite",
|
||||
"generate" : "jswrap_ESP8266_neopixelWrite",
|
||||
"params" : [
|
||||
["pin", "JsVar", "Pin for output signal."],
|
||||
["arrayOfData", "JsVar", "Array of LED data."]
|
||||
]
|
||||
}*/
|
||||
|
||||
__attribute__((section(".force.text"))) void jswrap_ESP8266_neopixelWrite(JsVar *jsPin, JsVar *jsArrayOfData) {
|
||||
if (jsPin == NULL) {
|
||||
jsExceptionHere(JSET_ERROR, "No output pin supplied.");
|
||||
return;
|
||||
}
|
||||
if (!jsvIsPin(jsPin)) {
|
||||
jsExceptionHere(JSET_ERROR, "Pin value is not a pin.");
|
||||
return;
|
||||
}
|
||||
Pin pin = jshGetPinFromVar(jsPin);
|
||||
if (!jshIsPinValid(pin)) {
|
||||
jsExceptionHere(JSET_ERROR, "Pin is not valid.");
|
||||
return;
|
||||
}
|
||||
if (jsArrayOfData == NULL) {
|
||||
jsExceptionHere(JSET_ERROR, "No data to send to LEDs.");
|
||||
return;
|
||||
}
|
||||
if (!jsvIsArray(jsArrayOfData)) {
|
||||
jsExceptionHere(JSET_ERROR, "Data must be an array.");
|
||||
return;
|
||||
}
|
||||
int dataLength = jsvGetArrayLength(jsArrayOfData);
|
||||
if (dataLength == 0) {
|
||||
jsExceptionHere(JSET_ERROR, "Data must be a non empty array.");
|
||||
return;
|
||||
}
|
||||
if (dataLength % 3 != 0) {
|
||||
jsExceptionHere(JSET_ERROR, "Data length must multiples of RGB bytes (3).");
|
||||
return;
|
||||
}
|
||||
uint8_t *pixels = (uint8 *)os_malloc(dataLength);
|
||||
if (pixels == NULL) {
|
||||
jsExceptionHere(JSET_ERROR, "Out of memory.");
|
||||
return;
|
||||
}
|
||||
int i;
|
||||
for (int i=0; i<dataLength; i++) {
|
||||
JsVar *jsItem = jsvGetArrayItem(jsArrayOfData, i);
|
||||
pixels[i] = jsvGetInteger(jsItem);
|
||||
jsvUnLock(jsItem);
|
||||
}
|
||||
|
||||
uint32_t numBytes = dataLength;
|
||||
|
||||
uint8_t *p, *end, pix, mask;
|
||||
uint32_t t, time0, time1, period, c, startTime, pinMask;
|
||||
pinMask = _BV(pin);
|
||||
p = pixels;
|
||||
end = p + numBytes;
|
||||
pix = *p++;
|
||||
mask = 0x80;
|
||||
c=0;
|
||||
startTime = 0;
|
||||
time0 = 14; // 14 cycles = (measured)
|
||||
//time0 = 28; // 28 cycles = 0.35us
|
||||
//time0 = 32; // 0.4us
|
||||
//time1 = 108; // 108 cycles = 1.36us
|
||||
time1 = 56; // 56 cycles = 0.7us
|
||||
//time1 = 64; // 64 cycles = 0.8us
|
||||
// Cycles/usec = 80
|
||||
// Period = cycles/usec * usecDuration
|
||||
//period = 136; // 136 cycles = 1.71us
|
||||
period = 100; // cycles = 1.25us
|
||||
//period = 104; // 1.3us
|
||||
//GPIO_REG_WRITE(GPIO_OUT_W1TS_ADDRESS, pinMask);
|
||||
//os_delay_us(100);
|
||||
//GPIO_REG_WRITE(GPIO_OUT_W1TC_ADDRESS, pinMask);
|
||||
//os_delay_us(100);
|
||||
//GPIO_REG_WRITE(GPIO_OUT_W1TS_ADDRESS, pinMask);
|
||||
while(1) {
|
||||
if (pix & mask)
|
||||
t = time1; // Bit high duration
|
||||
else
|
||||
t = time0;
|
||||
GPIO_REG_WRITE(GPIO_OUT_W1TS_ADDRESS, pinMask); // Set high
|
||||
startTime = _getCycleCount(); // Save start time
|
||||
while (((c = _getCycleCount()) - startTime) < t)
|
||||
; // Wait high duration
|
||||
GPIO_REG_WRITE(GPIO_OUT_W1TC_ADDRESS, pinMask); // Set low
|
||||
if (!(mask >>= 1)) { // Next bit/byte
|
||||
if (p >= end)
|
||||
break;
|
||||
pix = *p++;
|
||||
mask = 0x80;
|
||||
}
|
||||
while (((c = _getCycleCount()) - startTime) < period)
|
||||
; // Wait for bit start
|
||||
}
|
||||
while ((_getCycleCount() - startTime) < period)
|
||||
; // Wait for last bit
|
||||
os_free(pixels);
|
||||
}
|
||||
/*
|
||||
int d = jsvGetInteger(count);
|
||||
uint32_t cnt1 = _getCycleCount();
|
||||
os_delay_us ( d);
|
||||
uint32_t cnt2 = _getCycleCount();
|
||||
os_printf("Delaying for: %d\n", d);
|
||||
os_printf("Cycle count: %lu\n", cnt2-cnt1);
|
||||
}
|
||||
*/
|
||||
22
targets/esp8266/jswrap_esp8266.h
Normal file
22
targets/esp8266/jswrap_esp8266.h
Normal file
@ -0,0 +1,22 @@
|
||||
/*
|
||||
* This file is part of Espruino, a JavaScript interpreter for Microcontrollers
|
||||
*
|
||||
* Copyright (C) 2015 Gordon Williams <gw@pur3.co.uk>
|
||||
*
|
||||
* This Source Code Form is subject to the terms of the Mozilla Public
|
||||
* License, v. 2.0. If a copy of the MPL was not distributed with this
|
||||
* file, You can obtain one at http://mozilla.org/MPL/2.0/.
|
||||
*
|
||||
* ----------------------------------------------------------------------------
|
||||
* This file is designed to be parsed during the build process
|
||||
*
|
||||
* Contains ESP8266 board specific function definitions.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
#ifndef TARGETS_ESP8266_JSWRAP_ESP8266_H_
|
||||
#define TARGETS_ESP8266_JSWRAP_ESP8266_H_
|
||||
#include "jsvar.h"
|
||||
|
||||
void jswrap_ESP8266_neopixelWrite(JsVar *jsPin, JsVar *jsArrayOfData);
|
||||
|
||||
#endif /* TARGETS_ESP8266_JSWRAP_ESP8266_H_ */
|
||||
311
targets/esp8266/spi.c
Normal file
311
targets/esp8266/spi.c
Normal file
@ -0,0 +1,311 @@
|
||||
/*
|
||||
* This file is part of Espruino, a JavaScript interpreter for Microcontrollers
|
||||
*
|
||||
* Copyright (c) 2015 David Ogilvy (MetalPhreak)
|
||||
*
|
||||
* This Source Code Form is subject to the terms of the Mozilla Public
|
||||
* License, v. 2.0. If a copy of the MPL was not distributed with this
|
||||
* file, You can obtain one at http://mozilla.org/MPL/2.0/.
|
||||
*
|
||||
* ----------------------------------------------------------------------------
|
||||
* This file is designed to be parsed during the build process
|
||||
*
|
||||
* Contains ESP8266 board specific functions.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/**
|
||||
* The Github project from which this source file came from can be found
|
||||
* at: https://github.com/MetalPhreak/ESP8266_SPI_Driver
|
||||
*/
|
||||
|
||||
|
||||
#include "spi.h"
|
||||
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Function Name: spi_init
|
||||
// Description: Wrapper to setup HSPI/SPI GPIO pins and default SPI clock
|
||||
// Parameters: spi_no - SPI (0) or HSPI (1)
|
||||
//
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
void spi_init(uint8 spi_no){
|
||||
|
||||
if(spi_no > 1) return; //Only SPI and HSPI are valid spi modules.
|
||||
|
||||
spi_init_gpio(spi_no, SPI_CLK_USE_DIV);
|
||||
spi_clock(spi_no, SPI_CLK_PREDIV, SPI_CLK_CNTDIV);
|
||||
spi_tx_byte_order(spi_no, SPI_BYTE_ORDER_HIGH_TO_LOW);
|
||||
spi_rx_byte_order(spi_no, SPI_BYTE_ORDER_HIGH_TO_LOW);
|
||||
|
||||
SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_CS_SETUP|SPI_CS_HOLD);
|
||||
CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_FLASH_MODE);
|
||||
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Function Name: spi_init_gpio
|
||||
// Description: Initialises the GPIO pins for use as SPI pins.
|
||||
// Parameters: spi_no - SPI (0) or HSPI (1)
|
||||
// sysclk_as_spiclk - SPI_CLK_80MHZ_NODIV (1) if using 80MHz
|
||||
// sysclock for SPI clock.
|
||||
// SPI_CLK_USE_DIV (0) if using divider to
|
||||
// get lower SPI clock speed.
|
||||
//
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
void spi_init_gpio(uint8 spi_no, uint8 sysclk_as_spiclk){
|
||||
|
||||
// if(spi_no > 1) return; //Not required. Valid spi_no is checked with if/elif below.
|
||||
|
||||
uint32 clock_div_flag = 0;
|
||||
if(sysclk_as_spiclk){
|
||||
clock_div_flag = 0x0001;
|
||||
}
|
||||
|
||||
if(spi_no==SPI){
|
||||
WRITE_PERI_REG(PERIPHS_IO_MUX, 0x005|(clock_div_flag<<8)); //Set bit 8 if 80MHz sysclock required
|
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, 1);
|
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CMD_U, 1);
|
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA0_U, 1);
|
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA1_U, 1);
|
||||
}else if(spi_no==HSPI){
|
||||
WRITE_PERI_REG(PERIPHS_IO_MUX, 0x105|(clock_div_flag<<9)); //Set bit 9 if 80MHz sysclock required
|
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, 2); //GPIO12 is HSPI MISO pin (Master Data In)
|
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 2); //GPIO13 is HSPI MOSI pin (Master Data Out)
|
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, 2); //GPIO14 is HSPI CLK pin (Clock)
|
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, 2); //GPIO15 is HSPI CS pin (Chip Select / Slave Select)
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Function Name: spi_clock
|
||||
// Description: sets up the control registers for the SPI clock
|
||||
// Parameters: spi_no - SPI (0) or HSPI (1)
|
||||
// prediv - predivider value (actual division value)
|
||||
// cntdiv - postdivider value (actual division value)
|
||||
// Set either divider to 0 to disable all division (80MHz sysclock)
|
||||
//
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
void spi_clock(uint8 spi_no, uint16 prediv, uint8 cntdiv){
|
||||
|
||||
if(spi_no > 1) return;
|
||||
|
||||
if((prediv==0)|(cntdiv==0)){
|
||||
|
||||
WRITE_PERI_REG(SPI_CLOCK(spi_no), SPI_CLK_EQU_SYSCLK);
|
||||
|
||||
} else {
|
||||
|
||||
WRITE_PERI_REG(SPI_CLOCK(spi_no),
|
||||
(((prediv-1)&SPI_CLKDIV_PRE)<<SPI_CLKDIV_PRE_S)|
|
||||
(((cntdiv-1)&SPI_CLKCNT_N)<<SPI_CLKCNT_N_S)|
|
||||
(((cntdiv>>1)&SPI_CLKCNT_H)<<SPI_CLKCNT_H_S)|
|
||||
((0&SPI_CLKCNT_L)<<SPI_CLKCNT_L_S));
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Function Name: spi_tx_byte_order
|
||||
// Description: Setup the byte order for shifting data out of buffer
|
||||
// Parameters: spi_no - SPI (0) or HSPI (1)
|
||||
// byte_order - SPI_BYTE_ORDER_HIGH_TO_LOW (1)
|
||||
// Data is sent out starting with Bit31 and down to Bit0
|
||||
//
|
||||
// SPI_BYTE_ORDER_LOW_TO_HIGH (0)
|
||||
// Data is sent out starting with the lowest BYTE, from
|
||||
// MSB to LSB, followed by the second lowest BYTE, from
|
||||
// MSB to LSB, followed by the second highest BYTE, from
|
||||
// MSB to LSB, followed by the highest BYTE, from MSB to LSB
|
||||
// 0xABCDEFGH would be sent as 0xGHEFCDAB
|
||||
//
|
||||
//
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
void spi_tx_byte_order(uint8 spi_no, uint8 byte_order){
|
||||
|
||||
if(spi_no > 1) return;
|
||||
|
||||
if(byte_order){
|
||||
SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_WR_BYTE_ORDER);
|
||||
} else {
|
||||
CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_WR_BYTE_ORDER);
|
||||
}
|
||||
}
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Function Name: spi_rx_byte_order
|
||||
// Description: Setup the byte order for shifting data into buffer
|
||||
// Parameters: spi_no - SPI (0) or HSPI (1)
|
||||
// byte_order - SPI_BYTE_ORDER_HIGH_TO_LOW (1)
|
||||
// Data is read in starting with Bit31 and down to Bit0
|
||||
//
|
||||
// SPI_BYTE_ORDER_LOW_TO_HIGH (0)
|
||||
// Data is read in starting with the lowest BYTE, from
|
||||
// MSB to LSB, followed by the second lowest BYTE, from
|
||||
// MSB to LSB, followed by the second highest BYTE, from
|
||||
// MSB to LSB, followed by the highest BYTE, from MSB to LSB
|
||||
// 0xABCDEFGH would be read as 0xGHEFCDAB
|
||||
//
|
||||
//
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
void spi_rx_byte_order(uint8 spi_no, uint8 byte_order){
|
||||
|
||||
if(spi_no > 1) return;
|
||||
|
||||
if(byte_order){
|
||||
SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_RD_BYTE_ORDER);
|
||||
} else {
|
||||
CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_RD_BYTE_ORDER);
|
||||
}
|
||||
}
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Function Name: spi_transaction
|
||||
// Description: SPI transaction function
|
||||
// Parameters: spi_no - SPI (0) or HSPI (1)
|
||||
// cmd_bits - actual number of bits to transmit
|
||||
// cmd_data - command data
|
||||
// addr_bits - actual number of bits to transmit
|
||||
// addr_data - address data
|
||||
// dout_bits - actual number of bits to transmit
|
||||
// dout_data - output data
|
||||
// din_bits - actual number of bits to receive
|
||||
//
|
||||
// Returns: read data - uint32 containing read in data only if RX was set
|
||||
// 0 - something went wrong (or actual read data was 0)
|
||||
// 1 - data sent ok (or actual read data is 1)
|
||||
// Note: all data is assumed to be stored in the lower bits of
|
||||
// the data variables (for anything <32 bits).
|
||||
//
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
uint32 spi_transaction(uint8 spi_no, uint8 cmd_bits, uint16 cmd_data, uint32 addr_bits, uint32 addr_data, uint32 dout_bits, uint32 dout_data,
|
||||
uint32 din_bits, uint32 dummy_bits){
|
||||
|
||||
if(spi_no > 1) return 0; //Check for a valid SPI
|
||||
|
||||
//code for custom Chip Select as GPIO PIN here
|
||||
|
||||
while(spi_busy(spi_no)); //wait for SPI to be ready
|
||||
|
||||
//########## Enable SPI Functions ##########//
|
||||
//disable MOSI, MISO, ADDR, COMMAND, DUMMY in case previously set.
|
||||
CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MOSI|SPI_USR_MISO|SPI_USR_COMMAND|SPI_USR_ADDR|SPI_USR_DUMMY);
|
||||
|
||||
//enable functions based on number of bits. 0 bits = disabled.
|
||||
//This is rather inefficient but allows for a very generic function.
|
||||
//CMD ADDR and MOSI are set below to save on an extra if statement.
|
||||
// if(cmd_bits) {SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_COMMAND);}
|
||||
// if(addr_bits) {SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_ADDR);}
|
||||
if(din_bits) {SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MISO);}
|
||||
if(dummy_bits) {SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_DUMMY);}
|
||||
//########## END SECTION ##########//
|
||||
|
||||
//########## Setup Bitlengths ##########//
|
||||
WRITE_PERI_REG(SPI_USER1(spi_no), ((addr_bits-1)&SPI_USR_ADDR_BITLEN)<<SPI_USR_ADDR_BITLEN_S | //Number of bits in Address
|
||||
((dout_bits-1)&SPI_USR_MOSI_BITLEN)<<SPI_USR_MOSI_BITLEN_S | //Number of bits to Send
|
||||
((din_bits-1)&SPI_USR_MISO_BITLEN)<<SPI_USR_MISO_BITLEN_S | //Number of bits to receive
|
||||
((dummy_bits-1)&SPI_USR_DUMMY_CYCLELEN)<<SPI_USR_DUMMY_CYCLELEN_S); //Number of Dummy bits to insert
|
||||
//########## END SECTION ##########//
|
||||
|
||||
//########## Setup Command Data ##########//
|
||||
if(cmd_bits) {
|
||||
SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_COMMAND); //enable COMMAND function in SPI module
|
||||
uint16 command = cmd_data << (16-cmd_bits); //align command data to high bits
|
||||
command = ((command>>8)&0xff) | ((command<<8)&0xff00); //swap byte order
|
||||
WRITE_PERI_REG(SPI_USER2(spi_no), ((((cmd_bits-1)&SPI_USR_COMMAND_BITLEN)<<SPI_USR_COMMAND_BITLEN_S) | command&SPI_USR_COMMAND_VALUE));
|
||||
}
|
||||
//########## END SECTION ##########//
|
||||
|
||||
//########## Setup Address Data ##########//
|
||||
if(addr_bits){
|
||||
SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_ADDR); //enable ADDRess function in SPI module
|
||||
WRITE_PERI_REG(SPI_ADDR(spi_no), addr_data<<(32-addr_bits)); //align address data to high bits
|
||||
}
|
||||
|
||||
|
||||
//########## END SECTION ##########//
|
||||
|
||||
//########## Setup DOUT data ##########//
|
||||
if(dout_bits) {
|
||||
SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MOSI); //enable MOSI function in SPI module
|
||||
//copy data to W0
|
||||
if(READ_PERI_REG(SPI_USER(spi_no))&SPI_WR_BYTE_ORDER) {
|
||||
WRITE_PERI_REG(SPI_W0(spi_no), dout_data<<(32-dout_bits));
|
||||
} else {
|
||||
|
||||
uint8 dout_extra_bits = dout_bits%8;
|
||||
|
||||
if(dout_extra_bits){
|
||||
//if your data isn't a byte multiple (8/16/24/32 bits)and you don't have SPI_WR_BYTE_ORDER set, you need this to move the non-8bit remainder to the MSBs
|
||||
//not sure if there's even a use case for this, but it's here if you need it...
|
||||
//for example, 0xDA4 12 bits without SPI_WR_BYTE_ORDER would usually be output as if it were 0x0DA4,
|
||||
//of which 0xA4, and then 0x0 would be shifted out (first 8 bits of low byte, then 4 MSB bits of high byte - ie reverse byte order).
|
||||
//The code below shifts it out as 0xA4 followed by 0xD as you might require.
|
||||
WRITE_PERI_REG(SPI_W0(spi_no), ((0xFFFFFFFF<<(dout_bits - dout_extra_bits)&dout_data)<<(8-dout_extra_bits) | (0xFFFFFFFF>>(32-(dout_bits - dout_extra_bits)))&dout_data));
|
||||
} else {
|
||||
WRITE_PERI_REG(SPI_W0(spi_no), dout_data);
|
||||
}
|
||||
}
|
||||
}
|
||||
//########## END SECTION ##########//
|
||||
|
||||
//########## Begin SPI Transaction ##########//
|
||||
SET_PERI_REG_MASK(SPI_CMD(spi_no), SPI_USR);
|
||||
//########## END SECTION ##########//
|
||||
|
||||
//########## Return DIN data ##########//
|
||||
if(din_bits) {
|
||||
while(spi_busy(spi_no)); //wait for SPI transaction to complete
|
||||
|
||||
if(READ_PERI_REG(SPI_USER(spi_no))&SPI_RD_BYTE_ORDER) {
|
||||
return READ_PERI_REG(SPI_W0(spi_no)) >> (32-din_bits); //Assuming data in is written to MSB. TBC
|
||||
} else {
|
||||
return READ_PERI_REG(SPI_W0(spi_no)); //Read in the same way as DOUT is sent. Note existing contents of SPI_W0 remain unless overwritten!
|
||||
}
|
||||
|
||||
return 0; //something went wrong
|
||||
}
|
||||
//########## END SECTION ##########//
|
||||
|
||||
//Transaction completed
|
||||
return 1; //success
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
/*///////////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Function Name: func
|
||||
// Description:
|
||||
// Parameters:
|
||||
//
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
void func(params){
|
||||
|
||||
}
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////////*/
|
||||
|
||||
|
||||
75
targets/esp8266/spi.h
Normal file
75
targets/esp8266/spi.h
Normal file
@ -0,0 +1,75 @@
|
||||
/*
|
||||
* This file is part of Espruino, a JavaScript interpreter for Microcontrollers
|
||||
*
|
||||
* Copyright (c) 2015 David Ogilvy (MetalPhreak)
|
||||
*
|
||||
* This Source Code Form is subject to the terms of the Mozilla Public
|
||||
* License, v. 2.0. If a copy of the MPL was not distributed with this
|
||||
* file, You can obtain one at http://mozilla.org/MPL/2.0/.
|
||||
*
|
||||
* ----------------------------------------------------------------------------
|
||||
* This file is designed to be parsed during the build process
|
||||
*
|
||||
* Contains ESP8266 board specific functions.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/**
|
||||
* The Github project from which this source file came from can be found
|
||||
* at: https://github.com/MetalPhreak/ESP8266_SPI_Driver
|
||||
*/
|
||||
|
||||
#ifndef SPI_APP_H
|
||||
#define SPI_APP_H
|
||||
|
||||
#include "spi_register.h"
|
||||
#include "ets_sys.h"
|
||||
#include "osapi.h"
|
||||
//#include "uart.h"
|
||||
#include "os_type.h"
|
||||
|
||||
//Define SPI hardware modules
|
||||
#define SPI 0
|
||||
#define HSPI 1
|
||||
|
||||
#define SPI_CLK_USE_DIV 0
|
||||
#define SPI_CLK_80MHZ_NODIV 1
|
||||
|
||||
#define SPI_BYTE_ORDER_HIGH_TO_LOW 1
|
||||
#define SPI_BYTE_ORDER_LOW_TO_HIGH 0
|
||||
|
||||
#ifndef CPU_CLK_FREQ //Should already be defined in eagle_soc.h
|
||||
#define CPU_CLK_FREQ 80*1000000
|
||||
#endif
|
||||
|
||||
//Define some default SPI clock settings
|
||||
#define SPI_CLK_PREDIV 10
|
||||
#define SPI_CLK_CNTDIV 2
|
||||
#define SPI_CLK_FREQ CPU_CLK_FREQ/(SPI_CLK_PREDIV*SPI_CLK_CNTDIV) // 80 / 20 = 4 MHz
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
void spi_init(uint8 spi_no);
|
||||
void spi_init_gpio(uint8 spi_no, uint8 sysclk_as_spiclk);
|
||||
void spi_clock(uint8 spi_no, uint16 prediv, uint8 cntdiv);
|
||||
void spi_tx_byte_order(uint8 spi_no, uint8 byte_order);
|
||||
void spi_rx_byte_order(uint8 spi_no, uint8 byte_order);
|
||||
uint32 spi_transaction(uint8 spi_no, uint8 cmd_bits, uint16 cmd_data, uint32 addr_bits, uint32 addr_data, uint32 dout_bits, uint32 dout_data, uint32 din_bits, uint32 dummy_bits);
|
||||
|
||||
//Expansion Macros
|
||||
#define spi_busy(spi_no) READ_PERI_REG(SPI_CMD(spi_no))&SPI_USR
|
||||
|
||||
#define spi_txd(spi_no, bits, data) spi_transaction(spi_no, 0, 0, 0, 0, bits, (uint32) data, 0, 0)
|
||||
#define spi_tx8(spi_no, data) spi_transaction(spi_no, 0, 0, 0, 0, 8, (uint32) data, 0, 0)
|
||||
#define spi_tx16(spi_no, data) spi_transaction(spi_no, 0, 0, 0, 0, 16, (uint32) data, 0, 0)
|
||||
#define spi_tx32(spi_no, data) spi_transaction(spi_no, 0, 0, 0, 0, 32, (uint32) data, 0, 0)
|
||||
|
||||
#define spi_rxd(spi_no, bits) spi_transaction(spi_no, 0, 0, 0, 0, 0, 0, bits, 0)
|
||||
#define spi_rx8(spi_no) spi_transaction(spi_no, 0, 0, 0, 0, 0, 0, 8, 0)
|
||||
#define spi_rx16(spi_no) spi_transaction(spi_no, 0, 0, 0, 0, 0, 0, 16, 0)
|
||||
#define spi_rx32(spi_no) spi_transaction(spi_no, 0, 0, 0, 0, 0, 0, 32, 0)
|
||||
|
||||
#endif
|
||||
|
||||
277
targets/esp8266/spi_register.h
Normal file
277
targets/esp8266/spi_register.h
Normal file
@ -0,0 +1,277 @@
|
||||
/*
|
||||
* Copyright (c) 2010 - 2011 Espressif System
|
||||
* Modified by David Ogilvy (MetalPhreak)
|
||||
* Based on original file included in SDK 1.0.0
|
||||
*
|
||||
* Missing defines from previous SDK versions have
|
||||
* been added and are noted with comments. The
|
||||
* names of these defines are likely to change.
|
||||
*/
|
||||
|
||||
#ifndef SPI_REGISTER_H_INCLUDED
|
||||
#define SPI_REGISTER_H_INCLUDED
|
||||
|
||||
#define REG_SPI_BASE(i) (0x60000200-i*0x100)
|
||||
|
||||
#define SPI_CMD(i) (REG_SPI_BASE(i) + 0x0)
|
||||
#define SPI_FLASH_READ (BIT(31)) //From previous SDK
|
||||
#define SPI_FLASH_WREN (BIT(30)) //From previous SDK
|
||||
#define SPI_FLASH_WRDI (BIT(29)) //From previous SDK
|
||||
#define SPI_FLASH_RDID (BIT(28)) //From previous SDK
|
||||
#define SPI_FLASH_RDSR (BIT(27)) //From previous SDK
|
||||
#define SPI_FLASH_WRSR (BIT(26)) //From previous SDK
|
||||
#define SPI_FLASH_PP (BIT(25)) //From previous SDK
|
||||
#define SPI_FLASH_SE (BIT(24)) //From previous SDK
|
||||
#define SPI_FLASH_BE (BIT(23)) //From previous SDK
|
||||
#define SPI_FLASH_CE (BIT(22)) //From previous SDK
|
||||
#define SPI_FLASH_DP (BIT(21)) //From previous SDK
|
||||
#define SPI_FLASH_RES (BIT(20)) //From previous SDK
|
||||
#define SPI_FLASH_HPM (BIT(19)) //From previous SDK
|
||||
#define SPI_USR (BIT(18))
|
||||
|
||||
#define SPI_ADDR(i) (REG_SPI_BASE(i) + 0x4)
|
||||
|
||||
#define SPI_CTRL(i) (REG_SPI_BASE(i) + 0x8)
|
||||
#define SPI_WR_BIT_ORDER (BIT(26))
|
||||
#define SPI_RD_BIT_ORDER (BIT(25))
|
||||
#define SPI_QIO_MODE (BIT(24))
|
||||
#define SPI_DIO_MODE (BIT(23))
|
||||
#define SPI_TWO_BYTE_STATUS_EN (BIT(22)) //From previous SDK
|
||||
#define SPI_WP_REG (BIT(21)) //From previous SDK
|
||||
#define SPI_QOUT_MODE (BIT(20))
|
||||
#define SPI_SHARE_BUS (BIT(19)) //From previous SDK
|
||||
#define SPI_HOLD_MODE (BIT(18)) //From previous SDK
|
||||
#define SPI_ENABLE_AHB (BIT(17)) //From previous SDK
|
||||
#define SPI_SST_AAI (BIT(16)) //From previous SDK
|
||||
#define SPI_RESANDRES (BIT(15)) //From previous SDK
|
||||
#define SPI_DOUT_MODE (BIT(14))
|
||||
#define SPI_FASTRD_MODE (BIT(13))
|
||||
|
||||
#define SPI_CTRL1(i) (REG_SPI_BASE (i) + 0xC) //From previous SDK. Removed _FLASH_ from name to match other registers.
|
||||
#define SPI_CS_HOLD_DELAY 0x0000000F //Espressif BBS
|
||||
#define SPI_CS_HOLD_DELAY_S 28 //Espressif BBS
|
||||
#define SPI_CS_HOLD_DELAY_RES 0x00000FFF //Espressif BBS
|
||||
#define SPI_CS_HOLD_DELAY_RES_S 16 //Espressif BBS
|
||||
#define SPI_BUS_TIMER_LIMIT 0x0000FFFF //From previous SDK
|
||||
#define SPI_BUS_TIMER_LIMIT_S 0 //From previous SDK
|
||||
|
||||
|
||||
#define SPI_RD_STATUS(i) (REG_SPI_BASE(i) + 0x10)
|
||||
#define SPI_STATUS_EXT 0x000000FF //From previous SDK
|
||||
#define SPI_STATUS_EXT_S 24 //From previous SDK
|
||||
#define SPI_WB_MODE 0x000000FF //From previous SDK
|
||||
#define SPI_WB_MODE_S 16 //From previous SDK
|
||||
#define SPI_FLASH_STATUS_PRO_FLAG (BIT(7)) //From previous SDK
|
||||
#define SPI_FLASH_TOP_BOT_PRO_FLAG (BIT(5)) //From previous SDK
|
||||
#define SPI_FLASH_BP2 (BIT(4)) //From previous SDK
|
||||
#define SPI_FLASH_BP1 (BIT(3)) //From previous SDK
|
||||
#define SPI_FLASH_BP0 (BIT(2)) //From previous SDK
|
||||
#define SPI_FLASH_WRENABLE_FLAG (BIT(1)) //From previous SDK
|
||||
#define SPI_FLASH_BUSY_FLAG (BIT(0)) //From previous SDK
|
||||
|
||||
#define SPI_CTRL2(i) (REG_SPI_BASE(i) + 0x14)
|
||||
#define SPI_CS_DELAY_NUM 0x0000000F
|
||||
#define SPI_CS_DELAY_NUM_S 28
|
||||
#define SPI_CS_DELAY_MODE 0x00000003
|
||||
#define SPI_CS_DELAY_MODE_S 26
|
||||
#define SPI_MOSI_DELAY_NUM 0x00000007
|
||||
#define SPI_MOSI_DELAY_NUM_S 23
|
||||
#define SPI_MOSI_DELAY_MODE 0x00000003 //mode 0 : posedge; data set at positive edge of clk
|
||||
//mode 1 : negedge + 1 cycle delay, only if freq<10MHz ; data set at negitive edge of clk
|
||||
//mode 2 : Do not use this mode.
|
||||
#define SPI_MOSI_DELAY_MODE_S 21
|
||||
#define SPI_MISO_DELAY_NUM 0x00000007
|
||||
#define SPI_MISO_DELAY_NUM_S 18
|
||||
#define SPI_MISO_DELAY_MODE 0x00000003
|
||||
#define SPI_MISO_DELAY_MODE_S 16
|
||||
#define SPI_CK_OUT_HIGH_MODE 0x0000000F
|
||||
#define SPI_CK_OUT_HIGH_MODE_S 12
|
||||
#define SPI_CK_OUT_LOW_MODE 0x0000000F
|
||||
#define SPI_CK_OUT_LOW_MODE_S 8
|
||||
#define SPI_HOLD_TIME 0x0000000F
|
||||
#define SPI_HOLD_TIME_S 4
|
||||
#define SPI_SETUP_TIME 0x0000000F
|
||||
#define SPI_SETUP_TIME_S 0
|
||||
|
||||
#define SPI_CLOCK(i) (REG_SPI_BASE(i) + 0x18)
|
||||
#define SPI_CLK_EQU_SYSCLK (BIT(31))
|
||||
#define SPI_CLKDIV_PRE 0x00001FFF
|
||||
#define SPI_CLKDIV_PRE_S 18
|
||||
#define SPI_CLKCNT_N 0x0000003F
|
||||
#define SPI_CLKCNT_N_S 12
|
||||
#define SPI_CLKCNT_H 0x0000003F
|
||||
#define SPI_CLKCNT_H_S 6
|
||||
#define SPI_CLKCNT_L 0x0000003F
|
||||
#define SPI_CLKCNT_L_S 0
|
||||
|
||||
#define SPI_USER(i) (REG_SPI_BASE(i) + 0x1C)
|
||||
#define SPI_USR_COMMAND (BIT(31))
|
||||
#define SPI_USR_ADDR (BIT(30))
|
||||
#define SPI_USR_DUMMY (BIT(29))
|
||||
#define SPI_USR_MISO (BIT(28))
|
||||
#define SPI_USR_MOSI (BIT(27))
|
||||
#define SPI_USR_DUMMY_IDLE (BIT(26)) //From previous SDK
|
||||
#define SPI_USR_MOSI_HIGHPART (BIT(25))
|
||||
#define SPI_USR_MISO_HIGHPART (BIT(24))
|
||||
#define SPI_USR_PREP_HOLD (BIT(23)) //From previous SDK
|
||||
#define SPI_USR_CMD_HOLD (BIT(22)) //From previous SDK
|
||||
#define SPI_USR_ADDR_HOLD (BIT(21)) //From previous SDK
|
||||
#define SPI_USR_DUMMY_HOLD (BIT(20)) //From previous SDK
|
||||
#define SPI_USR_DIN_HOLD (BIT(19)) //From previous SDK
|
||||
#define SPI_USR_DOUT_HOLD (BIT(18)) //From previous SDK
|
||||
#define SPI_USR_HOLD_POL (BIT(17)) //From previous SDK
|
||||
#define SPI_SIO (BIT(16))
|
||||
#define SPI_FWRITE_QIO (BIT(15))
|
||||
#define SPI_FWRITE_DIO (BIT(14))
|
||||
#define SPI_FWRITE_QUAD (BIT(13))
|
||||
#define SPI_FWRITE_DUAL (BIT(12))
|
||||
#define SPI_WR_BYTE_ORDER (BIT(11))
|
||||
#define SPI_RD_BYTE_ORDER (BIT(10))
|
||||
#define SPI_AHB_ENDIAN_MODE 0x00000003 //From previous SDK
|
||||
#define SPI_AHB_ENDIAN_MODE_S 8 //From previous SDK
|
||||
#define SPI_CK_OUT_EDGE (BIT(7))
|
||||
#define SPI_CK_I_EDGE (BIT(6))
|
||||
#define SPI_CS_SETUP (BIT(5))
|
||||
#define SPI_CS_HOLD (BIT(4))
|
||||
#define SPI_AHB_USR_COMMAND (BIT(3)) //From previous SDK
|
||||
#define SPI_FLASH_MODE (BIT(2))
|
||||
#define SPI_AHB_USR_COMMAND_4BYTE (BIT(1)) //From previous SDK
|
||||
#define SPI_DOUTDIN (BIT(0)) //From previous SDK
|
||||
|
||||
//AHB = http://en.wikipedia.org/wiki/Advanced_Microcontroller_Bus_Architecture ?
|
||||
|
||||
|
||||
#define SPI_USER1(i) (REG_SPI_BASE(i) + 0x20)
|
||||
#define SPI_USR_ADDR_BITLEN 0x0000003F
|
||||
#define SPI_USR_ADDR_BITLEN_S 26
|
||||
#define SPI_USR_MOSI_BITLEN 0x000001FF
|
||||
#define SPI_USR_MOSI_BITLEN_S 17
|
||||
#define SPI_USR_MISO_BITLEN 0x000001FF
|
||||
#define SPI_USR_MISO_BITLEN_S 8
|
||||
#define SPI_USR_DUMMY_CYCLELEN 0x000000FF
|
||||
#define SPI_USR_DUMMY_CYCLELEN_S 0
|
||||
|
||||
#define SPI_USER2(i) (REG_SPI_BASE(i) + 0x24)
|
||||
#define SPI_USR_COMMAND_BITLEN 0x0000000F
|
||||
#define SPI_USR_COMMAND_BITLEN_S 28
|
||||
#define SPI_USR_COMMAND_VALUE 0x0000FFFF
|
||||
#define SPI_USR_COMMAND_VALUE_S 0
|
||||
|
||||
#define SPI_WR_STATUS(i) (REG_SPI_BASE(i) + 0x28)
|
||||
//previously defined as SPI_FLASH_USER3. No further info available.
|
||||
|
||||
#define SPI_PIN(i) (REG_SPI_BASE(i) + 0x2C)
|
||||
#define SPI_CS2_DIS (BIT(2))
|
||||
#define SPI_CS1_DIS (BIT(1))
|
||||
#define SPI_CS0_DIS (BIT(0))
|
||||
|
||||
#define SPI_SLAVE(i) (REG_SPI_BASE(i) + 0x30)
|
||||
#define SPI_SYNC_RESET (BIT(31))
|
||||
#define SPI_SLAVE_MODE (BIT(30))
|
||||
#define SPI_SLV_WR_RD_BUF_EN (BIT(29))
|
||||
#define SPI_SLV_WR_RD_STA_EN (BIT(28))
|
||||
#define SPI_SLV_CMD_DEFINE (BIT(27))
|
||||
#define SPI_TRANS_CNT 0x0000000F
|
||||
#define SPI_TRANS_CNT_S 23
|
||||
#define SPI_SLV_LAST_STATE 0x00000007 //From previous SDK
|
||||
#define SPI_SLV_LAST_STATE_S 20 //From previous SDK
|
||||
#define SPI_SLV_LAST_COMMAND 0x00000007 //From previous SDK
|
||||
#define SPI_SLV_LAST_COMMAND_S 17 //From previous SDK
|
||||
#define SPI_CS_I_MODE 0x00000003 //From previous SDK
|
||||
#define SPI_CS_I_MODE_S 10 //From previous SDK
|
||||
#define SPI_TRANS_DONE_EN (BIT(9))
|
||||
#define SPI_SLV_WR_STA_DONE_EN (BIT(8))
|
||||
#define SPI_SLV_RD_STA_DONE_EN (BIT(7))
|
||||
#define SPI_SLV_WR_BUF_DONE_EN (BIT(6))
|
||||
#define SPI_SLV_RD_BUF_DONE_EN (BIT(5))
|
||||
#define SLV_SPI_INT_EN 0x0000001f
|
||||
#define SLV_SPI_INT_EN_S 5
|
||||
#define SPI_TRANS_DONE (BIT(4))
|
||||
#define SPI_SLV_WR_STA_DONE (BIT(3))
|
||||
#define SPI_SLV_RD_STA_DONE (BIT(2))
|
||||
#define SPI_SLV_WR_BUF_DONE (BIT(1))
|
||||
#define SPI_SLV_RD_BUF_DONE (BIT(0))
|
||||
|
||||
#define SPI_SLAVE1(i) (REG_SPI_BASE(i) + 0x34)
|
||||
#define SPI_SLV_STATUS_BITLEN 0x0000001F
|
||||
#define SPI_SLV_STATUS_BITLEN_S 27
|
||||
#define SPI_SLV_STATUS_FAST_EN (BIT(26)) //From previous SDK
|
||||
#define SPI_SLV_STATUS_READBACK (BIT(25)) //From previous SDK
|
||||
#define SPI_SLV_BUF_BITLEN 0x000001FF
|
||||
#define SPI_SLV_BUF_BITLEN_S 16
|
||||
#define SPI_SLV_RD_ADDR_BITLEN 0x0000003F
|
||||
#define SPI_SLV_RD_ADDR_BITLEN_S 10
|
||||
#define SPI_SLV_WR_ADDR_BITLEN 0x0000003F
|
||||
#define SPI_SLV_WR_ADDR_BITLEN_S 4
|
||||
#define SPI_SLV_WRSTA_DUMMY_EN (BIT(3))
|
||||
#define SPI_SLV_RDSTA_DUMMY_EN (BIT(2))
|
||||
#define SPI_SLV_WRBUF_DUMMY_EN (BIT(1))
|
||||
#define SPI_SLV_RDBUF_DUMMY_EN (BIT(0))
|
||||
|
||||
|
||||
|
||||
#define SPI_SLAVE2(i) (REG_SPI_BASE(i) + 0x38)
|
||||
#define SPI_SLV_WRBUF_DUMMY_CYCLELEN 0X000000FF
|
||||
#define SPI_SLV_WRBUF_DUMMY_CYCLELEN_S 24
|
||||
#define SPI_SLV_RDBUF_DUMMY_CYCLELEN 0X000000FF
|
||||
#define SPI_SLV_RDBUF_DUMMY_CYCLELEN_S 16
|
||||
#define SPI_SLV_WRSTR_DUMMY_CYCLELEN 0X000000FF
|
||||
#define SPI_SLV_WRSTR_DUMMY_CYCLELEN_S 8
|
||||
#define SPI_SLV_RDSTR_DUMMY_CYCLELEN 0x000000FF
|
||||
#define SPI_SLV_RDSTR_DUMMY_CYCLELEN_S 0
|
||||
|
||||
#define SPI_SLAVE3(i) (REG_SPI_BASE(i) + 0x3C)
|
||||
#define SPI_SLV_WRSTA_CMD_VALUE 0x000000FF
|
||||
#define SPI_SLV_WRSTA_CMD_VALUE_S 24
|
||||
#define SPI_SLV_RDSTA_CMD_VALUE 0x000000FF
|
||||
#define SPI_SLV_RDSTA_CMD_VALUE_S 16
|
||||
#define SPI_SLV_WRBUF_CMD_VALUE 0x000000FF
|
||||
#define SPI_SLV_WRBUF_CMD_VALUE_S 8
|
||||
#define SPI_SLV_RDBUF_CMD_VALUE 0x000000FF
|
||||
#define SPI_SLV_RDBUF_CMD_VALUE_S 0
|
||||
|
||||
//Previous SDKs referred to these following registers as SPI_C0 etc.
|
||||
|
||||
#define SPI_W0(i) (REG_SPI_BASE(i) +0x40)
|
||||
#define SPI_W1(i) (REG_SPI_BASE(i) +0x44)
|
||||
#define SPI_W2(i) (REG_SPI_BASE(i) +0x48)
|
||||
#define SPI_W3(i) (REG_SPI_BASE(i) +0x4C)
|
||||
#define SPI_W4(i) (REG_SPI_BASE(i) +0x50)
|
||||
#define SPI_W5(i) (REG_SPI_BASE(i) +0x54)
|
||||
#define SPI_W6(i) (REG_SPI_BASE(i) +0x58)
|
||||
#define SPI_W7(i) (REG_SPI_BASE(i) +0x5C)
|
||||
#define SPI_W8(i) (REG_SPI_BASE(i) +0x60)
|
||||
#define SPI_W9(i) (REG_SPI_BASE(i) +0x64)
|
||||
#define SPI_W10(i) (REG_SPI_BASE(i) +0x68)
|
||||
#define SPI_W11(i) (REG_SPI_BASE(i) +0x6C)
|
||||
#define SPI_W12(i) (REG_SPI_BASE(i) +0x70)
|
||||
#define SPI_W13(i) (REG_SPI_BASE(i) +0x74)
|
||||
#define SPI_W14(i) (REG_SPI_BASE(i) +0x78)
|
||||
#define SPI_W15(i) (REG_SPI_BASE(i) +0x7C)
|
||||
|
||||
// +0x80 to +0xBC could be SPI_W16 through SPI_W31?
|
||||
|
||||
// +0xC0 to +0xEC not currently defined.
|
||||
|
||||
#define SPI_EXT0(i) (REG_SPI_BASE(i) + 0xF0) //From previous SDK. Removed _FLASH_ from name to match other registers.
|
||||
#define SPI_T_PP_ENA (BIT(31)) //From previous SDK
|
||||
#define SPI_T_PP_SHIFT 0x0000000F //From previous SDK
|
||||
#define SPI_T_PP_SHIFT_S 16 //From previous SDK
|
||||
#define SPI_T_PP_TIME 0x00000FFF //From previous SDK
|
||||
#define SPI_T_PP_TIME_S 0 //From previous SDK
|
||||
|
||||
#define SPI_EXT1(i) (REG_SPI_BASE(i) + 0xF4) //From previous SDK. Removed _FLASH_ from name to match other registers.
|
||||
#define SPI_T_ERASE_ENA (BIT(31)) //From previous SDK
|
||||
#define SPI_T_ERASE_SHIFT 0x0000000F //From previous SDK
|
||||
#define SPI_T_ERASE_SHIFT_S 16 //From previous SDK
|
||||
#define SPI_T_ERASE_TIME 0x00000FFF //From previous SDK
|
||||
#define SPI_T_ERASE_TIME_S 0 //From previous SDK
|
||||
|
||||
#define SPI_EXT2(i) (REG_SPI_BASE(i) + 0xF8) //From previous SDK. Removed _FLASH_ from name to match other registers.
|
||||
#define SPI_ST 0x00000007 //From previous SDK
|
||||
#define SPI_ST_S 0 //From previous SDK
|
||||
|
||||
#define SPI_EXT3(i) (REG_SPI_BASE(i) + 0xFC)
|
||||
#define SPI_INT_HOLD_ENA 0x00000003
|
||||
#define SPI_INT_HOLD_ENA_S 0
|
||||
#endif // SPI_REGISTER_H_INCLUDED
|
||||
@ -26,7 +26,7 @@ typedef long long int64_t;
|
||||
|
||||
#include <jsdevices.h>
|
||||
#include <jsinteractive.h>
|
||||
#include <jswrap_esp8266.h>
|
||||
#include <jswrap_esp8266_network.h>
|
||||
#include <ota.h>
|
||||
#include "ESP8266_board.h"
|
||||
|
||||
@ -259,6 +259,7 @@ void user_init() {
|
||||
|
||||
// Initialize the UART devices
|
||||
uart_init(BIT_RATE_115200, BIT_RATE_115200);
|
||||
//uart_init(BIT_RATE_9600, BIT_RATE_9600);
|
||||
os_delay_us(1000); // make sure there's a gap on uart output
|
||||
UART_SetPrintPort(1);
|
||||
system_set_os_print(1);
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user